include/asm/cpufeature.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <asm/alternative-macros.h>
32  * The safe value of a CPUID feature field is dependent on the implications
33  * of the values assigned to it by the architecture. Based on the relationship
34  * between the values, the features are classified into 3 types - LOWER_SAFE,
37  * The lowest value of all the CPUs is chosen for LOWER_SAFE and highest
76  *			sanitised value of the register. Only the bitfields
78  * @mask		Mask of the features that are overridden by @val
80  * A @mask field set to full-1 indicates that the corresponding field
83  * A @mask field set to full-0 with the corresponding @val field set
84  * to full-0 denotes that this field has no override
86  * A @mask field set to full-0 with the corresponding @val field set
87  * to full-1 denotes that this field has an invalid override.
95  * @arm64_ftr_reg - Feature register
123  * Each capability has the following list of attributes :
125  * 1) Scope of Detection : The system detects a given capability by
127  *    value of a field in CPU ID feature register or checking the cpu
134  *        booting CPUs, until the system decides that state of the
139  *        system decides to finalise the state of the capability. If the
140  *        capability relies on a field in one of the CPU ID feature
141  *        registers, we use the sanitised value of the register from the
149  *    The process of detection is usually denoted by "update" capability
152  * 2) Finalise the state : The kernel should finalise the state of a
154  *    actions if any. Usually, this is done, after all the boot-time
156  *    better decision based on the available set of CPUs. However, there
160  *    changes to the state of a capability once it finalises the capability
167  *    At the moment there are two passes of finalising the capabilities.
168  *      a) Boot CPU scope capabilities - Finalised by primary boot CPU via
170  *      b) Everything except (a) - Run via setup_system_capabilities().
174  *    by verifying that the CPU is compliant with the state of the
177  *	secondary_start_kernel()-> check_local_cpu_capabilities()
191  *    severity (e.g, a CPU could be prevented from booting or cause a
192  *    kernel panic). The CPU is allowed to "affect" the state of the
210  *	  check_local_cpu_capabilities() -> verify_local_cpu_capabilities()
212  * 5) Conflicts: Based on the state of the capability on a late CPU vs.
215  *		x-----------------------------x
217  *		|-----------------------------|
219  *		|-----------------------------|
221  *		x-----------------------------x
223  *     Two separate flag bits are defined to indicate whether each kind of
225  *		ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU - Case(a) is allowed
226  *		ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU - Case(b) is allowed
237  *     In some non-typical cases either both (a) and (b), or neither,
241  *     In case of a conflict, the CPU is prevented from booting. If the
256  * "enabled" as early as possibly on all booting CPUs.
281  * more CPUs in the system requires it. When one of these capabilities
289  * CPU feature detected at boot time based on system-wide value of a
298  * CPU feature detected at boot time based on feature of one or more CPUs.
319  * CPUs must match the state of the capability as detected by the boot CPU. In
320  * case of a conflict, a kernel panic is triggered.
343 	 * including the hotplugged CPUs, regardless of whether the
375 	 * An optional list of "matches/cpu_enable" pair for the same
376 	 * "capability" of the same "type" as described by the parent.
391 	return cap->type & ARM64_CPUCAP_SCOPE_MASK;  in cpucap_default_scope()
396  * of call backs, sharing the same capability bit.
405 	for (caps = entry->match_list; caps->matches; caps++)  in cpucap_multi_entry_cap_matches()
406 		if (caps->matches(caps, scope))  in cpucap_multi_entry_cap_matches()
470  * Test for a capability without a runtime check.
476  * @num must be a compile-time constant.
487  * Test for a capability without a runtime check.
493  * @num must be a compile-time constant.
506 	return (s64)(features << (64 - width - field)) >> (64 - width);  in cpuid_feature_extract_signed_field_width()
518 	return (u64)(features << (64 - width - field)) >> (64 - width);  in cpuid_feature_extract_unsigned_field_width()
528  * Fields that identify the version of the Performance Monitors Extension do
529  * not follow the standard ID scheme. See ARM DDI 0487E.a page D13-2825,
552 	return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);  in arm64_ftr_mask()
557 	return (reg->user_val | (reg->sys_val & reg->user_mask));  in arm64_ftr_reg_user_value()
578 	return (s64)cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width, ftrp->sign);  in arm64_ftr_value()
856 	 * However, by the "D10.1.4 Principles of the ID scheme  in id_aa64mmfr0_parange_to_phys_shift()
865 /* Check whether hardware update of the Access flag is supported */
937 	u64 oval = override->val;  in arm64_apply_feature_override()
942 	 * override code will set the mask to 0x0 and the value to non-zero for  in arm64_apply_feature_override()
947 	oval &= GENMASK_ULL(feat + width - 1, feat);  in arm64_apply_feature_override()
953 	if (oval == (oval & override->mask)) {  in arm64_apply_feature_override()
954 		val &= ~override->mask;  in arm64_apply_feature_override()