Lines Matching +full:5 +full:b

12 	.irp		b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
13 	.set		.Lv\b\().4s, \b
17 	.inst		0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
21 	.inst		0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 	.inst		0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
29 	.inst		0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
33 	.inst		0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
37 	.inst		0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
41 	.inst		0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
54 	ext		\s4\().16b, \s1\().16b, \s2\().16b, #12
55 	ext		v6.16b, \s0\().16b, \s1\().16b, #12
56 	ext		v7.16b, \s2\().16b, \s3\().16b, #8
60 	eor		v10.16b, \s0\().16b, \s1\().16b
82 	ext		v8.16b, v8.16b, v8.16b, #8
83 	ext		v9.16b, v9.16b, v9.16b, #8
89 0:	ld1		{v0.16b-v3.16b}, [x1], #64
92 	mov		v15.16b, v8.16b
93 	mov		v16.16b, v9.16b
95 CPU_LE(	rev32		v0.16b, v0.16b		)
96 CPU_LE(	rev32		v1.16b, v1.16b		)
97 CPU_LE(	rev32		v2.16b, v2.16b		)
98 CPU_LE(	rev32		v3.16b, v3.16b		)
100 	ext		v11.16b, v13.16b, v13.16b, #4
107 	ext		v11.16b, v14.16b, v14.16b, #4
109 	qround		b, v4, v0, v1, v2, v3
110 	qround		b, v0, v1, v2, v3, v4
111 	qround		b, v1, v2, v3, v4, v0
112 	qround		b, v2, v3, v4, v0, v1
113 	qround		b, v3, v4, v0, v1, v2
114 	qround		b, v4, v0, v1, v2, v3
115 	qround		b, v0, v1, v2, v3, v4
116 	qround		b, v1, v2, v3, v4, v0
117 	qround		b, v2, v3, v4, v0, v1
118 	qround		b, v3, v4
119 	qround		b, v4, v0
120 	qround		b, v0, v1
122 	eor		v8.16b, v8.16b, v15.16b
123 	eor		v9.16b, v9.16b, v16.16b
126 	cbnz		w2, 0b
131 	ext		v8.16b, v8.16b, v8.16b, #8
132 	ext		v9.16b, v9.16b, v9.16b, #8