arm64/crypto/sm3-ce-core.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * sm3-ce-core.S - SM3 secure hash using ARMv8.2 Crypto Extensions
12 	.irp		b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
13 	.set		.Lv\b\().4s, \b
17 	.inst		0xce60c000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
21 	.inst		0xce60c400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 	.inst		0xce400000 | .L\rd | (.L\rn << 5) | (.L\ra << 10) | (.L\rm << 16)
29 	.inst		0xce408000 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
33 	.inst		0xce408400 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
37 	.inst		0xce408800 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
41 	.inst		0xce408c00 | .L\rd | (.L\rn << 5) | ((\imm2) << 12) | (.L\rm << 16)
45 	sm3ss1		v5.4s, v8.4s, \t0\().4s, v9.4s
46 	shl		\t1\().4s, \t0\().4s, #1
47 	sri		\t1\().4s, \t0\().4s, #31
48 	sm3tt1\ab	v8.4s, v5.4s, v10.4s, \i
49 	sm3tt2\ab	v9.4s, v5.4s, \s0\().4s, \i
54 	ext		\s4\().16b, \s1\().16b, \s2\().16b, #12
55 	ext		v6.16b, \s0\().16b, \s1\().16b, #12
56 	ext		v7.16b, \s2\().16b, \s3\().16b, #8
57 	sm3partw1	\s4\().4s, \s0\().4s, \s3\().4s
60 	eor		v10.16b, \s0\().16b, \s1\().16b
68 	sm3partw2	\s4\().4s, v7.4s, v6.4s
79 	ld1		{v8.4s-v9.4s}, [x0]
80 	rev64		v8.4s, v8.4s
81 	rev64		v9.4s, v9.4s
82 	ext		v8.16b, v8.16b, v8.16b, #8
83 	ext		v9.16b, v9.16b, v9.16b, #8
89 0:	ld1		{v0.16b-v3.16b}, [x1], #64
92 	mov		v15.16b, v8.16b
93 	mov		v16.16b, v9.16b
95 CPU_LE(	rev32		v0.16b, v0.16b		)
96 CPU_LE(	rev32		v1.16b, v1.16b		)
97 CPU_LE(	rev32		v2.16b, v2.16b		)
98 CPU_LE(	rev32		v3.16b, v3.16b		)
100 	ext		v11.16b, v13.16b, v13.16b, #4
107 	ext		v11.16b, v14.16b, v14.16b, #4
122 	eor		v8.16b, v8.16b, v15.16b
123 	eor		v9.16b, v9.16b, v16.16b
129 	rev64		v8.4s, v8.4s
130 	rev64		v9.4s, v9.4s
131 	ext		v8.16b, v8.16b, v8.16b, #8
132 	ext		v9.16b, v9.16b, v9.16b, #8
133 	st1		{v8.4s-v9.4s}, [x0]