Lines Matching +full:in0 +full:- +full:in1
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm64/crypto/aes-neon.S - AES cipher for ARMv8 NEON
5 * Copyright (C) 2013 - 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
22 /* special case for the neon-bs driver calling into this one for CTS */
49 ld1 {v16.16b-v19.16b}, [\temp], #64
50 ld1 {v20.16b-v23.16b}, [\temp], #64
51 ld1 {v24.16b-v27.16b}, [\temp], #64
52 ld1 {v28.16b-v31.16b}, [\temp]
72 tbl \in\().16b, {v16.16b-v19.16b}, \in\().16b
74 tbx \in\().16b, {v20.16b-v23.16b}, v9.16b
76 tbx \in\().16b, {v24.16b-v27.16b}, v10.16b
77 tbx \in\().16b, {v28.16b-v31.16b}, v11.16b
83 /* Inverse MixColumns: pre-multiply by { 5, 0, 4, 0 } */
127 .macro sub_bytes_4x, in0, in1, in2, in3
128 sub v8.16b, \in0\().16b, v15.16b
129 tbl \in0\().16b, {v16.16b-v19.16b}, \in0\().16b
130 sub v9.16b, \in1\().16b, v15.16b
131 tbl \in1\().16b, {v16.16b-v19.16b}, \in1\().16b
133 tbl \in2\().16b, {v16.16b-v19.16b}, \in2\().16b
135 tbl \in3\().16b, {v16.16b-v19.16b}, \in3\().16b
136 tbx \in0\().16b, {v20.16b-v23.16b}, v8.16b
137 tbx \in1\().16b, {v20.16b-v23.16b}, v9.16b
139 tbx \in2\().16b, {v20.16b-v23.16b}, v10.16b
141 tbx \in3\().16b, {v20.16b-v23.16b}, v11.16b
143 tbx \in0\().16b, {v24.16b-v27.16b}, v8.16b
145 tbx \in1\().16b, {v24.16b-v27.16b}, v9.16b
147 tbx \in2\().16b, {v24.16b-v27.16b}, v10.16b
149 tbx \in3\().16b, {v24.16b-v27.16b}, v11.16b
151 tbx \in0\().16b, {v28.16b-v31.16b}, v8.16b
153 tbx \in1\().16b, {v28.16b-v31.16b}, v9.16b
154 tbx \in2\().16b, {v28.16b-v31.16b}, v10.16b
155 tbx \in3\().16b, {v28.16b-v31.16b}, v11.16b
158 .macro mul_by_x_2x, out0, out1, in0, in1, tmp0, tmp1, const
159 sshr \tmp0\().16b, \in0\().16b, #7
160 shl \out0\().16b, \in0\().16b, #1
161 sshr \tmp1\().16b, \in1\().16b, #7
163 shl \out1\().16b, \in1\().16b, #1
169 .macro mul_by_x2_2x, out0, out1, in0, in1, tmp0, tmp1, const
170 ushr \tmp0\().16b, \in0\().16b, #6
171 shl \out0\().16b, \in0\().16b, #2
172 ushr \tmp1\().16b, \in1\().16b, #6
174 shl \out1\().16b, \in1\().16b, #2
180 .macro mix_columns_2x, in0, in1, enc
182 /* Inverse MixColumns: pre-multiply by { 5, 0, 4, 0 } */
183 mul_by_x2_2x v8, v9, \in0, \in1, v10, v11, v12
184 eor \in0\().16b, \in0\().16b, v8.16b
186 eor \in1\().16b, \in1\().16b, v9.16b
188 eor \in0\().16b, \in0\().16b, v8.16b
189 eor \in1\().16b, \in1\().16b, v9.16b
192 mul_by_x_2x v8, v9, \in0, \in1, v10, v11, v12
193 rev32 v10.8h, \in0\().8h
194 rev32 v11.8h, \in1\().8h
197 eor \in0\().16b, \in0\().16b, v10.16b
198 eor \in1\().16b, \in1\().16b, v11.16b
199 tbl \in0\().16b, {\in0\().16b}, v14.16b
200 tbl \in1\().16b, {\in1\().16b}, v14.16b
201 eor \in0\().16b, \in0\().16b, v10.16b
202 eor \in1\().16b, \in1\().16b, v11.16b
205 .macro do_block_4x, enc, in0, in1, in2, in3, rounds, rk, rkp, i
209 .La\@: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
210 eor \in1\().16b, \in1\().16b, v15.16b /* ^round key */
214 tbl \in0\().16b, {\in0\().16b}, v13.16b /* ShiftRows */
215 tbl \in1\().16b, {\in1\().16b}, v13.16b /* ShiftRows */
218 sub_bytes_4x \in0, \in1, \in2, \in3
222 mix_columns_2x \in0, \in1, \enc
225 .Lb\@: eor \in0\().16b, \in0\().16b, v15.16b /* ^round key */
226 eor \in1\().16b, \in1\().16b, v15.16b /* ^round key */
231 .macro encrypt_block4x, in0, in1, in2, in3, rounds, rk, rkp, i
232 do_block_4x 1, \in0, \in1, \in2, \in3, \rounds, \rk, \rkp, \i
235 .macro decrypt_block4x, in0, in1, in2, in3, rounds, rk, rkp, i
236 do_block_4x 0, \in0, \in1, \in2, \in3, \rounds, \rk, \rkp, \i
239 #include "aes-modes.S"