Lines Matching +full:2 +full:c200000
158 clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
197 #address-cells = <2>;
198 #size-cells = <2>;
263 #address-cells = <2>;
264 #size-cells = <2>;
282 clocks = <&k3_clks 97 2>;
284 assigned-clocks = <&k3_clks 97 2>;
294 clocks = <&k3_clks 98 2>;
296 assigned-clocks = <&k3_clks 98 2>;
306 clocks = <&k3_clks 99 2>;
308 assigned-clocks = <&k3_clks 99 2>;
318 clocks = <&k3_clks 100 2>;
320 assigned-clocks = <&k3_clks 100 2>;
330 clocks = <&k3_clks 101 2>;
332 assigned-clocks = <&k3_clks 101 2>;
342 clocks = <&k3_clks 102 2>;
344 assigned-clocks = <&k3_clks 102 2>;
354 clocks = <&k3_clks 103 2>;
356 assigned-clocks = <&k3_clks 103 2>;
366 clocks = <&k3_clks 104 2>;
368 assigned-clocks = <&k3_clks 104 2>;
378 clocks = <&k3_clks 105 2>;
380 assigned-clocks = <&k3_clks 105 2>;
390 clocks = <&k3_clks 106 2>;
392 assigned-clocks = <&k3_clks 106 2>;
402 clocks = <&k3_clks 107 2>;
404 assigned-clocks = <&k3_clks 107 2>;
414 clocks = <&k3_clks 108 2>;
416 assigned-clocks = <&k3_clks 108 2>;
426 clocks = <&k3_clks 109 2>;
428 assigned-clocks = <&k3_clks 109 2>;
438 clocks = <&k3_clks 110 2>;
440 assigned-clocks = <&k3_clks 110 2>;
450 clocks = <&k3_clks 111 2>;
452 assigned-clocks = <&k3_clks 111 2>;
462 clocks = <&k3_clks 112 2>;
464 assigned-clocks = <&k3_clks 112 2>;
474 clocks = <&k3_clks 113 2>;
476 assigned-clocks = <&k3_clks 113 2>;
486 clocks = <&k3_clks 114 2>;
488 assigned-clocks = <&k3_clks 114 2>;
498 clocks = <&k3_clks 115 2>;
500 assigned-clocks = <&k3_clks 115 2>;
510 clocks = <&k3_clks 116 2>;
512 assigned-clocks = <&k3_clks 116 2>;
622 #gpio-cells = <2>;
626 #interrupt-cells = <2>;
639 #gpio-cells = <2>;
643 #interrupt-cells = <2>;
656 #gpio-cells = <2>;
660 #interrupt-cells = <2>;
673 #gpio-cells = <2>;
677 #interrupt-cells = <2>;
692 clocks = <&k3_clks 398 21>, <&k3_clks 398 2>;
696 #address-cells = <2>;
697 #size-cells = <2>;
724 clocks = <&k3_clks 270 2>;
736 clocks = <&k3_clks 271 2>;
748 clocks = <&k3_clks 272 2>;
760 clocks = <&k3_clks 273 2>;
772 clocks = <&k3_clks 274 2>;
784 clocks = <&k3_clks 275 2>;
796 clocks = <&k3_clks 276 2>;
806 #address-cells = <2>;
807 #size-cells = <2>;
816 clocks = <&k3_clks 72 2>, <&k3_clks 72 0>, <&k3_clks 72 2>,
817 <&k3_clks 72 2>, <&k3_clks 72 3>, <&k3_clks 72 3>;
837 csi0_port2: port@2 {
838 reg = <2>;
859 #address-cells = <2>;
860 #size-cells = <2>;
869 clocks = <&k3_clks 73 2>, <&k3_clks 73 0>, <&k3_clks 73 2>,
870 <&k3_clks 73 2>, <&k3_clks 73 3>, <&k3_clks 73 3>;
889 csi1_port2: port@2 {
890 reg = <2>;
911 #address-cells = <2>;
912 #size-cells = <2>;
921 clocks = <&k3_clks 74 2>, <&k3_clks 74 0>, <&k3_clks 74 2>,
922 <&k3_clks 74 2>, <&k3_clks 74 3>, <&k3_clks 74 3>;
942 csi2_port2: port@2 {
943 reg = <2>;
988 clocks = <&k3_clks 241 2>;
996 clocks = <&k3_clks 242 2>;
1006 clocks = <&k3_clks 140 1>, <&k3_clks 140 2>;
1008 assigned-clocks = <&k3_clks 140 2>;
1074 #size-cells = <2>;
1103 #size-cells = <2>;
1127 num-lanes = <2>;
1132 #size-cells = <2>;
1156 num-lanes = <2>;
1161 #size-cells = <2>;
1178 clocks = <&k3_clks 404 2>, <&k3_clks 404 6>, <&serdes_refclk>, <&k3_clks 404 5>;
1215 clocks = <&k3_clks 405 2>, <&k3_clks 405 6>, <&serdes_refclk>, <&k3_clks 405 5>;
1252 clocks = <&k3_clks 406 2>, <&k3_clks 406 6>, <&serdes_refclk>, <&k3_clks 406 5>;
1289 clocks = <&k3_clks 407 2>, <&k3_clks 407 6>, <&serdes_refclk>, <&k3_clks 407 5>;
1330 #address-cells = <2>;
1331 #size-cells = <2>;
1698 #address-cells = <2>;
1699 #size-cells = <2>;
1731 main_cpsw0_port2: port@2 {
1732 reg = <2>;
1800 ti,cpts-periodic-outputs = <2>;
1804 main_cpsw1: ethernet@c200000 {
1809 #address-cells = <2>;
1810 #size-cells = <2>;
1863 ti,cpts-periodic-outputs = <2>;
2233 #address-cells = <2>;
2234 #size-cells = <2>;
2673 <&k3_clks 218 2>,
2696 mcasp0: mcasp@2b00000 {
2714 mcasp1: mcasp@2b10000 {
2732 mcasp2: mcasp@2b20000 {
2750 mcasp3: mcasp@2b30000 {
2768 mcasp4: mcasp@2b40000 {