dts/ti/k3-j721s2-som-p0.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5  * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 		bootph-all;
23 	reserved_memory: reserved-memory {
24 		#address-cells = <2>;
25 		#size-cells = <2>;
31 			no-map;
34 		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
35 			compatible = "shared-dma-pool";
37 			no-map;
40 		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
41 			compatible = "shared-dma-pool";
43 			no-map;
46 		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
47 			compatible = "shared-dma-pool";
49 			no-map;
52 		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
53 			compatible = "shared-dma-pool";
55 			no-map;
58 		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
59 			compatible = "shared-dma-pool";
61 			no-map;
64 		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
65 			compatible = "shared-dma-pool";
67 			no-map;
70 		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
71 			compatible = "shared-dma-pool";
73 			no-map;
76 		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
77 			compatible = "shared-dma-pool";
79 			no-map;
82 		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
83 			compatible = "shared-dma-pool";
85 			no-map;
88 		main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
89 			compatible = "shared-dma-pool";
91 			no-map;
94 		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
95 			compatible = "shared-dma-pool";
97 			no-map;
100 		main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
101 			compatible = "shared-dma-pool";
103 			no-map;
106 		c71_0_dma_memory_region: c71-dma-memory@a6000000 {
107 			compatible = "shared-dma-pool";
109 			no-map;
112 		c71_0_memory_region: c71-memory@a6100000 {
113 			compatible = "shared-dma-pool";
115 			no-map;
118 		c71_1_dma_memory_region: c71-dma-memory@a7000000 {
119 			compatible = "shared-dma-pool";
121 			no-map;
124 		c71_1_memory_region: c71-memory@a7100000 {
125 			compatible = "shared-dma-pool";
127 			no-map;
130 		rtos_ipc_memory_region: ipc-memories@a8000000 {
133 			no-map;
137 	mux0: mux-controller-0 {
138 		compatible = "gpio-mux";
139 		#mux-state-cells = <1>;
140 		mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
143 	mux1: mux-controller-1 {
144 		compatible = "gpio-mux";
145 		#mux-state-cells = <1>;
146 		mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
149 	transceiver0: can-phy0 {
152 		#phy-cells = <0>;
153 		max-bitrate = <5000000>;
158 	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
159 		pinctrl-single,pins = <
177 	pmic_irq_pins_default: pmic-irq-default-pins {
178 		pinctrl-single,pins = <
186 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
187 		pinctrl-single,pins = <
195 	main_i2c0_pins_default: main-i2c0-default-pins {
196 		pinctrl-single,pins = <
202 	main_mcan16_pins_default: main-mcan16-default-pins {
203 		pinctrl-single,pins = <
212 	pinctrl-names = "default";
213 	pinctrl-0 = <&wkup_i2c0_pins_default>;
214 	clock-frequency = <400000>;
217 		/* CAV24C256WE-GT3 */
223 		compatible = "ti,tps6594-q1";
225 		system-power-controller;
226 		pinctrl-names = "default";
227 		pinctrl-0 = <&pmic_irq_pins_default>;
228 		interrupt-parent = <&wkup_gpio0>;
230 		gpio-controller;
231 		#gpio-cells = <2>;
232 		ti,primary-pmic;
233 		buck1234-supply = <&vsys_3v3>;
234 		buck5-supply = <&vsys_3v3>;
235 		ldo1-supply = <&vsys_3v3>;
236 		ldo2-supply = <&vsys_3v3>;
237 		ldo3-supply = <&vsys_3v3>;
238 		ldo4-supply = <&vsys_3v3>;
242 				regulator-name = "vdd_cpu_avs";
243 				regulator-min-microvolt = <600000>;
244 				regulator-max-microvolt = <900000>;
245 				regulator-boot-on;
246 				regulator-always-on;
247 				bootph-pre-ram;
251 				regulator-name = "vdd_mcu_0v85";
252 				regulator-min-microvolt = <850000>;
253 				regulator-max-microvolt = <850000>;
254 				regulator-boot-on;
255 				regulator-always-on;
259 				regulator-name = "vdd_mcuwk_0v8";
260 				regulator-min-microvolt = <800000>;
261 				regulator-max-microvolt = <800000>;
262 				regulator-boot-on;
263 				regulator-always-on;
267 				regulator-name = "vdd_mcu_gpioret_3v3";
268 				regulator-min-microvolt = <3300000>;
269 				regulator-max-microvolt = <3300000>;
270 				regulator-boot-on;
271 				regulator-always-on;
275 				regulator-name = "vdd_mcuio_1v8";
276 				regulator-min-microvolt = <1800000>;
277 				regulator-max-microvolt = <1800000>;
278 				regulator-boot-on;
279 				regulator-always-on;
283 				regulator-name = "vda_mcu_1v8";
284 				regulator-min-microvolt = <1800000>;
285 				regulator-max-microvolt = <1800000>;
286 				regulator-boot-on;
287 				regulator-always-on;
293 		compatible = "ti,tps6594-q1";
295 		system-power-controller;
296 		interrupt-parent = <&wkup_gpio0>;
298 		gpio-controller;
299 		#gpio-cells = <2>;
300 		buck1-supply = <&vsys_3v3>;
301 		buck2-supply = <&vsys_3v3>;
302 		buck3-supply = <&vsys_3v3>;
303 		buck4-supply = <&vsys_3v3>;
304 		buck5-supply = <&vsys_3v3>;
305 		ldo1-supply = <&vsys_3v3>;
306 		ldo2-supply = <&vsys_3v3>;
307 		ldo3-supply = <&vsys_3v3>;
308 		ldo4-supply = <&vsys_3v3>;
312 				regulator-name = "vdd_io_1v8_reg";
313 				regulator-min-microvolt = <1800000>;
314 				regulator-max-microvolt = <1800000>;
315 				regulator-always-on;
316 				regulator-boot-on;
320 				regulator-name = "vdd_fpd_1v1";
321 				regulator-min-microvolt = <1100000>;
322 				regulator-max-microvolt = <1100000>;
323 				regulator-boot-on;
324 				regulator-always-on;
328 				regulator-name = "vdd_phy_1v8";
329 				regulator-min-microvolt = <1800000>;
330 				regulator-max-microvolt = <1800000>;
331 				regulator-boot-on;
332 				regulator-always-on;
336 				regulator-name = "vdd_ddr_1v1";
337 				regulator-min-microvolt = <1100000>;
338 				regulator-max-microvolt = <1100000>;
339 				regulator-boot-on;
340 				regulator-always-on;
344 				regulator-name = "vdd_ram_0v85";
345 				regulator-min-microvolt = <850000>;
346 				regulator-max-microvolt = <850000>;
347 				regulator-boot-on;
348 				regulator-always-on;
352 				regulator-name = "vdd_wk_0v8";
353 				regulator-min-microvolt = <800000>;
354 				regulator-max-microvolt = <800000>;
355 				regulator-boot-on;
356 				regulator-always-on;
360 				regulator-name = "vdd_gpioret_3v3";
361 				regulator-min-microvolt = <3300000>;
362 				regulator-max-microvolt = <3300000>;
363 				regulator-boot-on;
364 				regulator-always-on;
368 				regulator-name = "vda_dll_0v8";
369 				regulator-min-microvolt = <800000>;
370 				regulator-max-microvolt = <800000>;
371 				regulator-boot-on;
372 				regulator-always-on;
376 				regulator-name = "vda_pll_1v8";
377 				regulator-min-microvolt = <1800000>;
378 				regulator-max-microvolt = <1800000>;
379 				regulator-boot-on;
380 				regulator-always-on;
386 		compatible = "ti,lp8764-q1";
388 		system-power-controller;
389 		interrupt-parent = <&wkup_gpio0>;
391 		gpio-controller;
392 		#gpio-cells = <2>;
393 		buck1234-supply = <&vsys_3v3>;
397 				regulator-name = "vdd_core_0v8";
398 				regulator-min-microvolt = <800000>;
399 				regulator-max-microvolt = <800000>;
400 				regulator-boot-on;
401 				regulator-always-on;
409 	pinctrl-names = "default";
410 	pinctrl-0 = <&main_i2c0_pins_default>;
411 	clock-frequency = <400000>;
416 		gpio-controller;
417 		#gpio-cells = <2>;
418 		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
427 	pinctrl-0 = <&main_mcan16_pins_default>;
428 	pinctrl-names = "default";
434 	pinctrl-names = "default";
435 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
438 		compatible = "jedec,spi-nor";
440 		spi-tx-bus-width = <8>;
441 		spi-rx-bus-width = <8>;
442 		spi-max-frequency = <25000000>;
443 		cdns,tshsl-ns = <60>;
444 		cdns,tsd2d-ns = <60>;
445 		cdns,tchsh-ns = <60>;
446 		cdns,tslch-ns = <60>;
447 		cdns,read-delay = <4>;
454 	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
455 		ti,mbox-rx = <0 0 0>;
456 		ti,mbox-tx = <1 0 0>;
459 	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
460 		ti,mbox-rx = <2 0 0>;
461 		ti,mbox-tx = <3 0 0>;
468 	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
469 		ti,mbox-rx = <0 0 0>;
470 		ti,mbox-tx = <1 0 0>;
473 	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
474 		ti,mbox-rx = <2 0 0>;
475 		ti,mbox-tx = <3 0 0>;
482 	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
483 		ti,mbox-rx = <0 0 0>;
484 		ti,mbox-tx = <1 0 0>;
487 	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
488 		ti,mbox-rx = <2 0 0>;
489 		ti,mbox-tx = <3 0 0>;
496 	mbox_c71_0: mbox-c71-0 {
497 		ti,mbox-rx = <0 0 0>;
498 		ti,mbox-tx = <1 0 0>;
501 	mbox_c71_1: mbox-c71-1 {
502 		ti,mbox-rx = <2 0 0>;
503 		ti,mbox-tx = <3 0 0>;
509 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
515 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
520 	ti,cluster-mode = <0>;
524 	ti,cluster-mode = <0>;
554 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
560 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
566 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
572 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
579 	memory-region = <&c71_0_dma_memory_region>,
586 	memory-region = <&c71_1_dma_memory_region>,