dts/ti/k3-j721s2-main.dtsi

100 		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 162 0>;
137 		#address-cells = <2>;
138 		#size-cells = <2>;
203 		#address-cells = <2>;
204 		#size-cells = <2>;
225 		assigned-clock-parents = <&k3_clks 63 2>;
237 		assigned-clock-parents = <&k3_clks 64 2>;
249 		assigned-clock-parents = <&k3_clks 65 2>;
261 		assigned-clock-parents = <&k3_clks 66 2>;
273 		assigned-clock-parents = <&k3_clks 67 2>;
285 		assigned-clock-parents = <&k3_clks 68 2>;
297 		assigned-clock-parents = <&k3_clks 69 2>;
309 		assigned-clock-parents = <&k3_clks 70 2>;
321 		assigned-clock-parents = <&k3_clks 71 2>;
333 		assigned-clock-parents = <&k3_clks 72 2>;
345 		assigned-clock-parents = <&k3_clks 73 2>;
357 		assigned-clock-parents = <&k3_clks 74 2>;
369 		assigned-clock-parents = <&k3_clks 75 2>;
381 		assigned-clock-parents = <&k3_clks 76 2>;
393 		assigned-clock-parents = <&k3_clks 77 2>;
405 		assigned-clock-parents = <&k3_clks 78 2>;
417 		assigned-clock-parents = <&k3_clks 79 2>;
429 		assigned-clock-parents = <&k3_clks 80 2>;
441 		assigned-clock-parents = <&k3_clks 81 2>;
453 		assigned-clock-parents = <&k3_clks 82 2>;
562 		#gpio-cells = <2>;
566 		#interrupt-cells = <2>;
579 		#gpio-cells = <2>;
583 		#interrupt-cells = <2>;
596 		#gpio-cells = <2>;
600 		#interrupt-cells = <2>;
613 		#gpio-cells = <2>;
617 		#interrupt-cells = <2>;
713 		clocks = <&k3_clks 179 2>;
726 		assigned-clock-parents = <&k3_clks 98 2>;
754 		assigned-clock-parents = <&k3_clks 99 2>;
776 		#address-cells = <2>;
777 		#size-cells = <2>;
1138 	main_cpsw: ethernet@c200000 {
1143 		#address-cells = <2>;
1144 		#size-cells = <2>;
1197 			ti,cpts-periodic-outputs = <2>;
1209 		#address-cells = <2>;
1210 		#size-cells = <2>;
1235 		#address-cells = <2>;
1236 		#size-cells = <2>;
1266 				csi0_port2: port@2 {
1267 					reg = <2>;
1288 		#address-cells = <2>;
1289 		#size-cells = <2>;
1319 				csi1_port2: port@2 {
1320 					reg = <2>;
1408 		#size-cells = <2>;
1420 				<0 0 0 2 &pcie1_intc 0>, /* INT B */
1818 			 <&k3_clks 158 2>,