dts/ti/k3-j721s2-common-proc-board.dts

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3  * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2-som-p0.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-cadence.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-serdes.h"
18 	compatible = "ti,j721s2-evm", "ti,j721s2";
22 		stdout-path = "serial2:115200n8";
37 	evm_12v0: fixedregulator-evm12v0 {
39 		compatible = "regulator-fixed";
40 		regulator-name = "evm_12v0";
41 		regulator-min-microvolt = <12000000>;
42 		regulator-max-microvolt = <12000000>;
43 		regulator-always-on;
44 		regulator-boot-on;
47 	vsys_3v3: fixedregulator-vsys3v3 {
49 		compatible = "regulator-fixed";
50 		regulator-name = "vsys_3v3";
51 		regulator-min-microvolt = <3300000>;
52 		regulator-max-microvolt = <3300000>;
53 		vin-supply = <&evm_12v0>;
54 		regulator-always-on;
55 		regulator-boot-on;
58 	vsys_5v0: fixedregulator-vsys5v0 {
60 		compatible = "regulator-fixed";
61 		regulator-name = "vsys_5v0";
62 		regulator-min-microvolt = <5000000>;
63 		regulator-max-microvolt = <5000000>;
64 		vin-supply = <&evm_12v0>;
65 		regulator-always-on;
66 		regulator-boot-on;
69 	vdd_mmc1: fixedregulator-sd {
71 		compatible = "regulator-fixed";
72 		regulator-name = "vdd_mmc1";
73 		regulator-min-microvolt = <3300000>;
74 		regulator-max-microvolt = <3300000>;
75 		regulator-boot-on;
76 		enable-active-high;
77 		vin-supply = <&vsys_3v3>;
81 	vdd_sd_dv: gpio-regulator-TLV71033 {
83 		compatible = "regulator-gpio";
84 		regulator-name = "tlv71033";
85 		pinctrl-names = "default";
86 		pinctrl-0 = <&vdd_sd_dv_pins_default>;
87 		regulator-min-microvolt = <1800000>;
88 		regulator-max-microvolt = <3300000>;
89 		regulator-boot-on;
90 		vin-supply = <&vsys_5v0>;
91 		gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
96 	transceiver1: can-phy1 {
98 		#phy-cells = <0>;
99 		max-bitrate = <5000000>;
100 		pinctrl-names = "default";
101 		pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
102 		standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_LOW>;
103 		enable-gpios = <&wkup_gpio0 0 GPIO_ACTIVE_HIGH>;
106 	transceiver2: can-phy2 {
108 		#phy-cells = <0>;
109 		max-bitrate = <5000000>;
110 		pinctrl-names = "default";
111 		pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
112 		standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
115 	transceiver3: can-phy3 {
117 		#phy-cells = <0>;
118 		max-bitrate = <5000000>;
119 		standby-gpios = <&exp2 7 GPIO_ACTIVE_LOW>;
120 		enable-gpios = <&exp2 6 GPIO_ACTIVE_HIGH>;
121 		mux-states = <&mux0 1>;
124 	transceiver4: can-phy4 {
126 		#phy-cells = <0>;
127 		max-bitrate = <5000000>;
128 		standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>;
129 		mux-states = <&mux1 1>;
134 	main_uart8_pins_default: main-uart8-default-pins {
135 		pinctrl-single,pins = <
143 	main_i2c3_pins_default: main-i2c3-default-pins {
144 		pinctrl-single,pins = <
150 	main_i2c5_pins_default: main-i2c5-default-pins {
151 		pinctrl-single,pins = <
157 	main_mmc1_pins_default: main-mmc1-default-pins {
158 		pinctrl-single,pins = <
170 	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
171 		pinctrl-single,pins = <
176 	main_usbss0_pins_default: main-usbss0-default-pins {
177 		pinctrl-single,pins = <
182 	main_mcan3_pins_default: main-mcan3-default-pins {
183 		pinctrl-single,pins = <
189 	main_mcan5_pins_default: main-mcan5-default-pins {
190 		pinctrl-single,pins = <
198 	wkup_uart0_pins_default: wkup-uart0-default-pins {
199 		pinctrl-single,pins = <
205 	mcu_uart0_pins_default: mcu-uart0-default-pins {
206 		pinctrl-single,pins = <
214 	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
215 		pinctrl-single,pins = <
231 	mcu_mdio_pins_default: mcu-mdio-default-pins {
232 		pinctrl-single,pins = <
238 	mcu_mcan0_pins_default: mcu-mcan0-default-pins {
239 		pinctrl-single,pins = <
245 	mcu_mcan1_pins_default: mcu-mcan1-default-pins {
246 		pinctrl-single,pins = <
252 	mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins {
253 		pinctrl-single,pins = <
259 	mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins {
260 		pinctrl-single,pins = <
265 	mcu_adc0_pins_default: mcu-adc0-default-pins {
266 		pinctrl-single,pins = <
278 	mcu_adc1_pins_default: mcu-adc1-default-pins {
279 		pinctrl-single,pins = <
293 	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins {
294 		pinctrl-single,pins = <
317 	pinctrl-names = "default";
318 	pinctrl-0 = <&wkup_uart0_pins_default>;
323 	pinctrl-names = "default";
324 	pinctrl-0 = <&mcu_uart0_pins_default>;
329 	pinctrl-names = "default";
330 	pinctrl-0 = <&main_uart8_pins_default>;
332 	power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
336 	clock-frequency = <400000>;
341 		gpio-controller;
342 		#gpio-cells = <2>;
343 		gpio-line-names = "PCIE_2L_MODE_SEL", "PCIE_2L_PERSTZ", "PCIE_2L_RC_RSTZ",
353 		gpio-controller;
354 		#gpio-cells = <2>;
355 		gpio-line-names = "APPLE_AUTH_RSTZ", "MLB_RSTZ", "GPIO_USD_PWR_EN", "USBC_PWR_EN",
365 	pinctrl-names = "default";
366 	pinctrl-0 = <&main_i2c5_pins_default>;
367 	clock-frequency = <400000>;
373 		gpio-controller;
374 		#gpio-cells = <2>;
375 		gpio-line-names = "CSI2_EXP_RSTZ", "CSI2_EXP_A_GPIO0",
385 	non-removable;
386 	ti,driver-strength-ohm = <50>;
387 	disable-wp;
393 	pinctrl-0 = <&main_mmc1_pins_default>;
394 	pinctrl-names = "default";
395 	disable-wp;
396 	vmmc-supply = <&vdd_mmc1>;
397 	vqmmc-supply = <&vdd_sd_dv>;
401 	pinctrl-names = "default";
402 	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
406 	phy0: ethernet-phy@0 {
408 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
409 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
410 		ti,min-output-impedance;
415 	phy-mode = "rgmii-rxid";
416 	phy-handle = <&phy0>;
420 	idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_USB>,
425 	clock-frequency = <100000000>;
432 		cdns,num-lanes = <1>;
433 		#phy-cells = <0>;
434 		cdns,phy-type = <PHY_TYPE_PCIE>;
440 	idle-states = <1>; /* USB0 to SERDES lane 1 */
445 	pinctrl-0 = <&main_usbss0_pins_default>;
446 	pinctrl-names = "default";
447 	ti,vbus-divider;
448 	ti,usb2-only;
453 	maximum-speed = "high-speed";
458 	pinctrl-names = "default";
459 	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
462 		compatible = "jedec,spi-nor";
464 		spi-tx-bus-width = <1>;
465 		spi-rx-bus-width = <4>;
466 		spi-max-frequency = <40000000>;
467 		cdns,tshsl-ns = <60>;
468 		cdns,tsd2d-ns = <60>;
469 		cdns,tchsh-ns = <60>;
470 		cdns,tslch-ns = <60>;
471 		cdns,read-delay = <2>;
477 	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
479 	phy-names = "pcie-phy";
480 	num-lanes = <1>;
485 	pinctrl-names = "default";
486 	pinctrl-0 = <&mcu_mcan0_pins_default>;
492 	pinctrl-names = "default";
493 	pinctrl-0 = <&mcu_mcan1_pins_default>;
498 	pinctrl-0 = <&mcu_adc0_pins_default>;
499 	pinctrl-names = "default";
502 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
507 	pinctrl-0 = <&mcu_adc1_pins_default>;
508 	pinctrl-names = "default";
511 		ti,adc-channels = <0 1 2 3 4 5 6 7>;
517 	pinctrl-names = "default";
518 	pinctrl-0 = <&main_mcan3_pins_default>;
524 	pinctrl-names = "default";
525 	pinctrl-0 = <&main_mcan5_pins_default>;