Lines Matching +full:buck5 +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
29 no-map;
32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
33 compatible = "shared-dma-pool";
35 no-map;
38 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
39 compatible = "shared-dma-pool";
41 no-map;
44 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
45 compatible = "shared-dma-pool";
47 no-map;
50 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
51 compatible = "shared-dma-pool";
53 no-map;
56 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
57 compatible = "shared-dma-pool";
59 no-map;
62 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
63 compatible = "shared-dma-pool";
65 no-map;
68 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
69 compatible = "shared-dma-pool";
71 no-map;
74 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
75 compatible = "shared-dma-pool";
77 no-map;
80 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
81 compatible = "shared-dma-pool";
83 no-map;
86 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
87 compatible = "shared-dma-pool";
89 no-map;
92 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
93 compatible = "shared-dma-pool";
95 no-map;
98 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
99 compatible = "shared-dma-pool";
101 no-map;
104 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
105 compatible = "shared-dma-pool";
107 no-map;
110 c66_0_memory_region: c66-memory@a6100000 {
111 compatible = "shared-dma-pool";
113 no-map;
116 c66_0_dma_memory_region: c66-dma-memory@a7000000 {
117 compatible = "shared-dma-pool";
119 no-map;
122 c66_1_memory_region: c66-memory@a7100000 {
123 compatible = "shared-dma-pool";
125 no-map;
128 c71_0_dma_memory_region: c71-dma-memory@a8000000 {
129 compatible = "shared-dma-pool";
131 no-map;
134 c71_0_memory_region: c71-memory@a8100000 {
135 compatible = "shared-dma-pool";
137 no-map;
140 rtos_ipc_memory_region: ipc-memories@aa000000 {
143 no-map;
149 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
150 pinctrl-single,pins = <
156 pmic_irq_pins_default: pmic-irq-default-pins {
157 pinctrl-single,pins = <
162 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
163 pinctrl-single,pins = <
178 mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
179 pinctrl-single,pins = <
200 pinctrl-names = "default";
201 pinctrl-0 = <&wkup_i2c0_pins_default>;
202 clock-frequency = <400000>;
205 /* CAV24C256WE-GT3 */
211 compatible = "ti,tps6594-q1";
213 system-power-controller;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pmic_irq_pins_default>;
216 interrupt-parent = <&wkup_gpio0>;
218 gpio-controller;
219 #gpio-cells = <2>;
220 ti,primary-pmic;
221 buck12-supply = <&vsys_3v3>;
222 buck3-supply = <&vsys_3v3>;
223 buck4-supply = <&vsys_3v3>;
224 buck5-supply = <&vsys_3v3>;
225 ldo1-supply = <&vsys_3v3>;
226 ldo2-supply = <&vsys_3v3>;
227 ldo3-supply = <&vsys_3v3>;
228 ldo4-supply = <&vsys_3v3>;
232 regulator-name = "vdd_cpu_avs";
233 regulator-min-microvolt = <600000>;
234 regulator-max-microvolt = <900000>;
235 regulator-boot-on;
236 regulator-always-on;
237 bootph-pre-ram;
241 regulator-name = "vdd_mcu_0v85";
242 regulator-min-microvolt = <850000>;
243 regulator-max-microvolt = <850000>;
244 regulator-boot-on;
245 regulator-always-on;
249 regulator-name = "vdd_ddr_1v1";
250 regulator-min-microvolt = <1100000>;
251 regulator-max-microvolt = <1100000>;
252 regulator-boot-on;
253 regulator-always-on;
256 bucka5: buck5 {
257 regulator-name = "vdd_phyio_1v8";
258 regulator-min-microvolt = <1800000>;
259 regulator-max-microvolt = <1800000>;
260 regulator-boot-on;
261 regulator-always-on;
265 regulator-name = "vdd1_lpddr4_1v8";
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
268 regulator-boot-on;
269 regulator-always-on;
273 regulator-name = "vdd_mcuio_1v8";
274 regulator-min-microvolt = <1800000>;
275 regulator-max-microvolt = <1800000>;
276 regulator-boot-on;
277 regulator-always-on;
281 regulator-name = "vdda_dll_0v8";
282 regulator-min-microvolt = <800000>;
283 regulator-max-microvolt = <800000>;
284 regulator-boot-on;
285 regulator-always-on;
289 regulator-name = "vda_mcu_1v8";
290 regulator-min-microvolt = <1800000>;
291 regulator-max-microvolt = <1800000>;
292 regulator-boot-on;
293 regulator-always-on;
299 compatible = "ti,tps6594-q1";
301 system-power-controller;
302 interrupt-parent = <&wkup_gpio0>;
304 gpio-controller;
305 #gpio-cells = <2>;
306 buck1234-supply = <&vsys_3v3>;
307 buck5-supply = <&vsys_3v3>;
308 ldo1-supply = <&vsys_3v3>;
309 ldo2-supply = <&vsys_3v3>;
310 ldo3-supply = <&vsys_3v3>;
311 ldo4-supply = <&vsys_3v3>;
315 regulator-name = "vdd_core_0v8";
316 regulator-min-microvolt = <800000>;
317 regulator-max-microvolt = <800000>;
318 regulator-boot-on;
319 regulator-always-on;
322 buckb5: buck5 {
323 regulator-name = "vdd_ram_0v85";
324 regulator-min-microvolt = <850000>;
325 regulator-max-microvolt = <850000>;
326 regulator-boot-on;
327 regulator-always-on;
331 regulator-name = "vdd_sd_dv";
332 regulator-min-microvolt = <1800000>;
333 regulator-max-microvolt = <3300000>;
334 regulator-boot-on;
335 regulator-always-on;
339 regulator-name = "vdd_usb_3v3";
340 regulator-min-microvolt = <3300000>;
341 regulator-max-microvolt = <3300000>;
342 regulator-boot-on;
343 regulator-always-on;
347 regulator-name = "vdd_io_1v8";
348 regulator-min-microvolt = <1800000>;
349 regulator-max-microvolt = <1800000>;
350 regulator-boot-on;
351 regulator-always-on;
355 regulator-name = "vda_pll_1v8";
356 regulator-min-microvolt = <1800000>;
357 regulator-max-microvolt = <1800000>;
358 regulator-boot-on;
359 regulator-always-on;
367 pinctrl-names = "default";
368 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
371 compatible = "jedec,spi-nor";
373 spi-tx-bus-width = <8>;
374 spi-rx-bus-width = <8>;
375 spi-max-frequency = <25000000>;
376 cdns,tshsl-ns = <60>;
377 cdns,tsd2d-ns = <60>;
378 cdns,tchsh-ns = <60>;
379 cdns,tslch-ns = <60>;
380 cdns,read-delay = <0>;
383 compatible = "fixed-partitions";
384 #address-cells = <1>;
385 #size-cells = <1>;
398 label = "ospi.u-boot";
435 pinctrl-names = "default";
436 pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
441 compatible = "cypress,hyperflash", "cfi-flash";
445 compatible = "fixed-partitions";
446 #address-cells = <1>;
447 #size-cells = <1>;
460 label = "hbmc.u-boot";
486 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
487 ti,mbox-rx = <0 0 0>;
488 ti,mbox-tx = <1 0 0>;
491 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
492 ti,mbox-rx = <2 0 0>;
493 ti,mbox-tx = <3 0 0>;
501 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
502 ti,mbox-rx = <0 0 0>;
503 ti,mbox-tx = <1 0 0>;
506 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
507 ti,mbox-rx = <2 0 0>;
508 ti,mbox-tx = <3 0 0>;
516 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
517 ti,mbox-rx = <0 0 0>;
518 ti,mbox-tx = <1 0 0>;
521 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
522 ti,mbox-rx = <2 0 0>;
523 ti,mbox-tx = <3 0 0>;
531 mbox_c66_0: mbox-c66-0 {
532 ti,mbox-rx = <0 0 0>;
533 ti,mbox-tx = <1 0 0>;
536 mbox_c66_1: mbox-c66-1 {
537 ti,mbox-rx = <2 0 0>;
538 ti,mbox-tx = <3 0 0>;
546 mbox_c71_0: mbox-c71-0 {
547 ti,mbox-rx = <0 0 0>;
548 ti,mbox-tx = <1 0 0>;
554 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
560 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
565 ti,cluster-mode = <0>;
569 ti,cluster-mode = <0>;
603 memory-region = <&main_r5fss0_core0_dma_memory_region>,
609 memory-region = <&main_r5fss0_core1_dma_memory_region>,
615 memory-region = <&main_r5fss1_core0_dma_memory_region>,
621 memory-region = <&main_r5fss1_core1_dma_memory_region>,
628 memory-region = <&c66_0_dma_memory_region>,
635 memory-region = <&c66_1_dma_memory_region>,
642 memory-region = <&c71_0_dma_memory_region>,