dts/ti/k3-j721e-som-p0.dtsi

17 		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
18 		      <0x00000008 0x80000000 0x00000000 0x80000000>;
27 			reg = <0x00 0x9e800000 0x00 0x01800000>;
28 			alignment = <0x1000>;
34 			reg = <0x00 0xa0000000 0x00 0x100000>;
40 			reg = <0x00 0xa0100000 0x00 0xf00000>;
46 			reg = <0x00 0xa1000000 0x00 0x100000>;
52 			reg = <0x00 0xa1100000 0x00 0xf00000>;
58 			reg = <0x00 0xa2000000 0x00 0x100000>;
64 			reg = <0x00 0xa2100000 0x00 0xf00000>;
70 			reg = <0x00 0xa3000000 0x00 0x100000>;
76 			reg = <0x00 0xa3100000 0x00 0xf00000>;
82 			reg = <0x00 0xa4000000 0x00 0x100000>;
88 			reg = <0x00 0xa4100000 0x00 0xf00000>;
94 			reg = <0x00 0xa5000000 0x00 0x100000>;
100 			reg = <0x00 0xa5100000 0x00 0xf00000>;
106 			reg = <0x00 0xa6000000 0x00 0x100000>;
112 			reg = <0x00 0xa6100000 0x00 0xf00000>;
118 			reg = <0x00 0xa7000000 0x00 0x100000>;
124 			reg = <0x00 0xa7100000 0x00 0xf00000>;
130 			reg = <0x00 0xa8000000 0x00 0x100000>;
136 			reg = <0x00 0xa8100000 0x00 0xf00000>;
141 			reg = <0x00 0xaa000000 0x00 0x01c00000>;
142 			alignment = <0x1000>;
151 			J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
152 			J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
158 			J721E_WKUP_IOPAD(0x0d4, PIN_INPUT, 7) /* (G26) WKUP_GPIO0_9 */
164 			J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
165 			J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0)  /* MCU_OSPI0_DQS */
166 			J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* MCU_OSPI0_D0 */
167 			J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* MCU_OSPI0_D1 */
168 			J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* MCU_OSPI0_D2 */
169 			J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* MCU_OSPI0_D3 */
170 			J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* MCU_OSPI0_D4 */
171 			J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* MCU_OSPI0_D5 */
172 			J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* MCU_OSPI0_D6 */
173 			J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* MCU_OSPI0_D7 */
174 			J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
180 			J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1)  /* MCU_HYPERBUS0_CK */
181 			J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1)  /* MCU_HYPERBUS0_CKn */
182 			J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_CSn0 */
183 			J721E_WKUP_IOPAD(0x54, PIN_OUTPUT, 3) /* MCU_HYPERBUS0_CSn1 */
184 			J721E_WKUP_IOPAD(0x30, PIN_OUTPUT, 1) /* MCU_HYPERBUS0_RESETn */
185 			J721E_WKUP_IOPAD(0x8, PIN_INPUT, 1)   /* MCU_HYPERBUS0_RWDS */
186 			J721E_WKUP_IOPAD(0xc, PIN_INPUT, 1)   /* MCU_HYPERBUS0_DQ0 */
187 			J721E_WKUP_IOPAD(0x10, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ1 */
188 			J721E_WKUP_IOPAD(0x14, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ2 */
189 			J721E_WKUP_IOPAD(0x18, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ3 */
190 			J721E_WKUP_IOPAD(0x1c, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ4 */
191 			J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ5 */
192 			J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ6 */
193 			J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1)  /* MCU_HYPERBUS0_DQ7 */
201 	pinctrl-0 = <&wkup_i2c0_pins_default>;
207 		reg = <0x50>;
212 		reg = <0x48>;
215 		pinctrl-0 = <&pmic_irq_pins_default>;
300 		reg = <0x4c>;
368 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
370 	flash@0 {
372 		reg = <0x0>;
380 		cdns,read-delay = <0>;
387 			partition@0 {
389 				reg = <0x0 0x80000>;
394 				reg = <0x80000 0x200000>;
399 				reg = <0x280000 0x400000>;
404 				reg = <0x680000 0x20000>;
409 				reg = <0x6a0000 0x20000>;
414 				reg = <0x6c0000 0x100000>;
419 				reg = <0x800000 0x37c0000>;
424 				reg = <0x3fe0000 0x20000>;
436 	pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
437 	ranges = <0x00 0x00 0x05 0x00000000 0x4000000>, /* 64MB Flash on CS0 */
438 		 <0x01 0x00 0x05 0x04000000 0x800000>; /* 8MB RAM on CS1 */
440 	flash@0,0 {
442 		reg = <0x00 0x00 0x4000000>;
449 			partition@0 {
451 				reg = <0x0 0x80000>;
456 				reg = <0x80000 0x200000>;
461 				reg = <0x280000 0x400000>;
466 				reg = <0x680000 0x40000>;
471 				reg = <0x6c0000 0x100000>;
476 				reg = <0x800000 0x3800000>;
487 		ti,mbox-rx = <0 0 0>;
488 		ti,mbox-tx = <1 0 0>;
492 		ti,mbox-rx = <2 0 0>;
493 		ti,mbox-tx = <3 0 0>;
502 		ti,mbox-rx = <0 0 0>;
503 		ti,mbox-tx = <1 0 0>;
507 		ti,mbox-rx = <2 0 0>;
508 		ti,mbox-tx = <3 0 0>;
517 		ti,mbox-rx = <0 0 0>;
518 		ti,mbox-tx = <1 0 0>;
522 		ti,mbox-rx = <2 0 0>;
523 		ti,mbox-tx = <3 0 0>;
531 	mbox_c66_0: mbox-c66-0 {
532 		ti,mbox-rx = <0 0 0>;
533 		ti,mbox-tx = <1 0 0>;
537 		ti,mbox-rx = <2 0 0>;
538 		ti,mbox-tx = <3 0 0>;
546 	mbox_c71_0: mbox-c71-0 {
547 		ti,mbox-rx = <0 0 0>;
548 		ti,mbox-tx = <1 0 0>;
565 	ti,cluster-mode = <0>;
569 	ti,cluster-mode = <0>;