dts/ti/k3-j721e-evm-pcie0-ep.dtso

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
8  * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/ti,sci_pm_domain.h>
17 #include "k3-pinctrl.h"
20  * Since Root Complex and Endpoint modes are mutually exclusive
28 	#address-cells = <2>;
29 	#size-cells = <2>;
30 	interrupt-parent = <&gic500>;
32 	pcie0_ep: pcie-ep@2900000 {
33 		compatible = "ti,j721e-pcie-ep";
38 		reg-names = "intd_cfg", "user_cfg", "reg", "mem";
39 		interrupt-names = "link_state";
41 		ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
42 		max-link-speed = <3>;
43 		num-lanes = <1>;
44 		power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
46 		clock-names = "fck";
47 		max-functions = /bits/ 8 <6>;
48 		max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
49 		dma-coherent;
51 		phy-names = "pcie-phy";