dts/ti/k3-j7200-som-p0.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3  * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
10 #include "k3-j7200.dtsi"
15 		bootph-all;
21 	reserved_memory: reserved-memory {
22 		#address-cells = <2>;
23 		#size-cells = <2>;
29 			no-map;
32 		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
33 			compatible = "shared-dma-pool";
35 			no-map;
38 		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
39 			compatible = "shared-dma-pool";
41 			no-map;
44 		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
45 			compatible = "shared-dma-pool";
47 			no-map;
50 		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
51 			compatible = "shared-dma-pool";
53 			no-map;
56 		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
57 			compatible = "shared-dma-pool";
59 			no-map;
62 		main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
63 			compatible = "shared-dma-pool";
65 			no-map;
68 		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
69 			compatible = "shared-dma-pool";
71 			no-map;
74 		main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
75 			compatible = "shared-dma-pool";
77 			no-map;
80 		rtos_ipc_memory_region: ipc-memories@a4000000 {
83 			no-map;
87 	mux0: mux-controller-0 {
88 		compatible = "gpio-mux";
89 		#mux-state-cells = <1>;
90 		mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
93 	mux1: mux-controller-1 {
94 		compatible = "gpio-mux";
95 		#mux-state-cells = <1>;
96 		mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
99 	transceiver0: can-phy0 {
102 		#phy-cells = <0>;
103 		max-bitrate = <5000000>;
108 	mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins {
109 		pinctrl-single,pins = <
126 	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
127 		pinctrl-single,pins = <
144 	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
145 			pinctrl-single,pins = <
153 	pmic_irq_pins_default: pmic-irq-default-pins {
154 		pinctrl-single,pins = <
161 	main_i2c0_pins_default: main-i2c0-default-pins {
162 		pinctrl-single,pins = <
168 	main_mcan0_pins_default: main-mcan0-default-pins {
169 		pinctrl-single,pins = <
181 	pinctrl-names = "default";
182 	pinctrl-0 = <&mcu_fss0_hpb0_pins_default>;
187 		compatible = "cypress,hyperflash", "cfi-flash";
191 			compatible = "fixed-partitions";
192 			#address-cells = <1>;
193 			#size-cells = <1>;
206 				label = "hbmc.u-boot";
227 	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
228 		ti,mbox-rx = <0 0 0>;
229 		ti,mbox-tx = <1 0 0>;
232 	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
233 		ti,mbox-rx = <2 0 0>;
234 		ti,mbox-tx = <3 0 0>;
242 	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
243 		ti,mbox-rx = <0 0 0>;
244 		ti,mbox-tx = <1 0 0>;
247 	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
248 		ti,mbox-rx = <2 0 0>;
249 		ti,mbox-tx = <3 0 0>;
255 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
261 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
266 	ti,cluster-mode = <0>;
284 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
290 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
295 	pinctrl-names = "default";
296 	pinctrl-0 = <&main_i2c0_pins_default>;
297 	clock-frequency = <400000>;
302 		gpio-controller;
303 		#gpio-cells = <2>;
304 		gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
313 	pinctrl-names = "default";
314 	pinctrl-0 = <&wkup_i2c0_pins_default>;
315 	clock-frequency = <400000>;
323 		compatible = "ti,tps6594-q1";
325 		system-power-controller;
326 		pinctrl-names = "default";
327 		pinctrl-0 = <&pmic_irq_pins_default>;
328 		interrupt-parent = <&wkup_gpio0>;
330 		gpio-controller;
331 		#gpio-cells = <2>;
332 		ti,primary-pmic;
333 		buck1-supply = <&vsys_3v3>;
334 		buck2-supply = <&vsys_3v3>;
335 		buck3-supply = <&vsys_3v3>;
336 		buck4-supply = <&vsys_3v3>;
337 		buck5-supply = <&vsys_3v3>;
338 		ldo1-supply = <&vsys_3v3>;
339 		ldo2-supply = <&vsys_3v3>;
340 		ldo3-supply = <&vsys_3v3>;
341 		ldo4-supply = <&vsys_3v3>;
344 			bucka1: buck1 {
345 				regulator-name = "vda_mcu_1v8";
346 				regulator-min-microvolt = <1800000>;
347 				regulator-max-microvolt = <1800000>;
348 				regulator-boot-on;
349 				regulator-always-on;
353 				regulator-name = "vdd_mcuio_1v8";
354 				regulator-min-microvolt = <1800000>;
355 				regulator-max-microvolt = <1800000>;
356 				regulator-boot-on;
357 				regulator-always-on;
361 				regulator-name = "vdd_mcu_0v85";
362 				regulator-min-microvolt = <850000>;
363 				regulator-max-microvolt = <850000>;
364 				regulator-boot-on;
365 				regulator-always-on;
369 				regulator-name = "vdd_ddr_1v1";
370 				regulator-min-microvolt = <1100000>;
371 				regulator-max-microvolt = <1100000>;
372 				regulator-boot-on;
373 				regulator-always-on;
377 				regulator-name = "vdd_phyio_1v8";
378 				regulator-min-microvolt = <1800000>;
379 				regulator-max-microvolt = <1800000>;
380 				regulator-boot-on;
381 				regulator-always-on;
385 				regulator-name = "vdd1_lpddr4_1v8";
386 				regulator-min-microvolt = <1800000>;
387 				regulator-max-microvolt = <1800000>;
388 				regulator-boot-on;
389 				regulator-always-on;
393 				regulator-name = "vda_dll_0v8";
394 				regulator-min-microvolt = <800000>;
395 				regulator-max-microvolt = <800000>;
396 				regulator-boot-on;
397 				regulator-always-on;
401 				regulator-name = "vdd_wk_0v8";
402 				regulator-min-microvolt = <800000>;
403 				regulator-max-microvolt = <800000>;
404 				regulator-boot-on;
405 				regulator-always-on;
409 				regulator-name = "vda_pll_1v8";
410 				regulator-min-microvolt = <1800000>;
411 				regulator-max-microvolt = <1800000>;
412 				regulator-boot-on;
413 				regulator-always-on;
419 		compatible = "ti,lp8764-q1";
421 		system-power-controller;
422 		interrupt-parent = <&wkup_gpio0>;
424 		gpio-controller;
425 		#gpio-cells = <2>;
426 		buck1-supply = <&vsys_3v3>;
427 		buck2-supply = <&vsys_3v3>;
428 		buck3-supply = <&vsys_3v3>;
429 		buck4-supply = <&vsys_3v3>;
432 			buckb1: buck1 {
433 				regulator-name = "vdd_cpu_avs";
434 				regulator-min-microvolt = <600000>;
435 				regulator-max-microvolt = <900000>;
436 				regulator-always-on;
437 				regulator-boot-on;
438 				bootph-pre-ram;
442 				regulator-name = "vdd_ram_0v85";
443 				regulator-min-microvolt = <850000>;
444 				regulator-max-microvolt = <850000>;
445 				regulator-boot-on;
446 				regulator-always-on;
450 				regulator-name = "vdd_core_0v85";
451 				regulator-min-microvolt = <850000>;
452 				regulator-max-microvolt = <850000>;
453 				regulator-boot-on;
454 				regulator-always-on;
458 				regulator-name = "vdd_io_1v8";
459 				regulator-min-microvolt = <1800000>;
460 				regulator-max-microvolt = <1800000>;
461 				regulator-boot-on;
462 				regulator-always-on;
470 	pinctrl-names = "default";
471 	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
474 		compatible = "jedec,spi-nor";
476 		spi-tx-bus-width = <8>;
477 		spi-rx-bus-width = <8>;
478 		spi-max-frequency = <25000000>;
479 		cdns,tshsl-ns = <60>;
480 		cdns,tsd2d-ns = <60>;
481 		cdns,tchsh-ns = <60>;
482 		cdns,tslch-ns = <60>;
483 		cdns,read-delay = <4>;
486 			compatible = "fixed-partitions";
487 			#address-cells = <1>;
488 			#size-cells = <1>;
501 				label = "ospi.u-boot";
530 	pinctrl-0 = <&main_mcan0_pins_default>;
531 	pinctrl-names = "default";