Lines Matching +full:rx +full:- +full:shared

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721s2.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
14 bootph-all;
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
27 no-map;
30 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
31 compatible = "shared-dma-pool";
33 no-map;
36 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
37 compatible = "shared-dma-pool";
39 no-map;
42 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
43 compatible = "shared-dma-pool";
45 no-map;
48 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
49 compatible = "shared-dma-pool";
51 no-map;
54 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
55 compatible = "shared-dma-pool";
57 no-map;
60 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
61 compatible = "shared-dma-pool";
63 no-map;
66 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
67 compatible = "shared-dma-pool";
69 no-map;
72 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
73 compatible = "shared-dma-pool";
75 no-map;
78 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
79 compatible = "shared-dma-pool";
81 no-map;
84 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
85 compatible = "shared-dma-pool";
87 no-map;
90 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
91 compatible = "shared-dma-pool";
93 no-map;
96 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
97 compatible = "shared-dma-pool";
99 no-map;
102 c71_0_dma_memory_region: c71-dma-memory@a6000000 {
103 compatible = "shared-dma-pool";
105 no-map;
108 c71_0_memory_region: c71-memory@a6100000 {
109 compatible = "shared-dma-pool";
111 no-map;
114 c71_1_dma_memory_region: c71-dma-memory@a7000000 {
115 compatible = "shared-dma-pool";
117 no-map;
120 c71_1_memory_region: c71-memory@a7100000 {
121 compatible = "shared-dma-pool";
123 no-map;
126 rtos_ipc_memory_region: ipc-memories@a8000000 {
129 no-map;
135 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins {
136 bootph-all;
137 pinctrl-single,pins = <
154 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
155 pinctrl-single,pins = <
164 pinctrl-names = "default";
165 pinctrl-0 = <&wkup_i2c0_pins_default>;
166 clock-frequency = <400000>;
169 /* AT24C512C-MAHM-T */
177 pinctrl-names = "default";
178 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
181 compatible = "jedec,spi-nor";
183 spi-tx-bus-width = <8>;
184 spi-rx-bus-width = <8>;
185 spi-max-frequency = <25000000>;
186 cdns,tshsl-ns = <60>;
187 cdns,tsd2d-ns = <60>;
188 cdns,tchsh-ns = <60>;
189 cdns,tslch-ns = <60>;
190 cdns,read-delay = <4>;
193 bootph-all;
194 compatible = "fixed-partitions";
195 #address-cells = <1>;
196 #size-cells = <1>;
209 label = "ospi.u-boot";
229 bootph-pre-ram;
240 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
241 ti,mbox-rx = <0 0 0>;
242 ti,mbox-tx = <1 0 0>;
245 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
246 ti,mbox-rx = <2 0 0>;
247 ti,mbox-tx = <3 0 0>;
254 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
255 ti,mbox-rx = <0 0 0>;
256 ti,mbox-tx = <1 0 0>;
259 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
260 ti,mbox-rx = <2 0 0>;
261 ti,mbox-tx = <3 0 0>;
268 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
269 ti,mbox-rx = <0 0 0>;
270 ti,mbox-tx = <1 0 0>;
273 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
274 ti,mbox-rx = <2 0 0>;
275 ti,mbox-tx = <3 0 0>;
282 mbox_c71_0: mbox-c71-0 {
283 ti,mbox-rx = <0 0 0>;
284 ti,mbox-tx = <1 0 0>;
287 mbox_c71_1: mbox-c71-1 {
288 ti,mbox-rx = <2 0 0>;
289 ti,mbox-tx = <3 0 0>;
295 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
301 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
306 ti,cluster-mode = <0>;
310 ti,cluster-mode = <0>;
340 memory-region = <&main_r5fss0_core0_dma_memory_region>,
346 memory-region = <&main_r5fss0_core1_dma_memory_region>,
352 memory-region = <&main_r5fss1_core0_dma_memory_region>,
358 memory-region = <&main_r5fss1_core1_dma_memory_region>,
365 memory-region = <&c71_0_dma_memory_region>,
372 memory-region = <&c71_1_dma_memory_region>,