Lines Matching +full:pinctrl +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-am68-sk-som.dtsi"
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-cadence.h>
13 #include <dt-bindings/phy/phy.h>
15 #include "k3-serdes.h"
18 compatible = "ti,am68-sk", "ti,j721s2";
22 stdout-path = "serial2:115200n8";
37 vusb_main: regulator-vusb-main5v0 {
39 compatible = "regulator-fixed";
40 regulator-name = "vusb-main5v0";
41 regulator-min-microvolt = <5000000>;
42 regulator-max-microvolt = <5000000>;
43 regulator-always-on;
44 regulator-boot-on;
47 vsys_3v3: regulator-vsys3v3 {
49 compatible = "regulator-fixed";
50 regulator-name = "vsys_3v3";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 vin-supply = <&vusb_main>;
54 regulator-always-on;
55 regulator-boot-on;
58 vdd_mmc1: regulator-sd {
60 compatible = "regulator-fixed";
61 regulator-name = "vdd_mmc1";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
64 regulator-boot-on;
65 enable-active-high;
66 vin-supply = <&vsys_3v3>;
70 vdd_sd_dv: regulator-tlv71033 {
72 compatible = "regulator-gpio";
73 regulator-name = "tlv71033";
74 pinctrl-names = "default";
75 pinctrl-0 = <&vdd_sd_dv_pins_default>;
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <3300000>;
78 regulator-boot-on;
79 vin-supply = <&vsys_3v3>;
85 vsys_io_1v8: regulator-vsys-io-1v8 {
86 compatible = "regulator-fixed";
87 regulator-name = "vsys_io_1v8";
88 regulator-min-microvolt = <1800000>;
89 regulator-max-microvolt = <1800000>;
90 regulator-always-on;
91 regulator-boot-on;
94 vsys_io_1v2: regulator-vsys-io-1v2 {
95 compatible = "regulator-fixed";
96 regulator-name = "vsys_io_1v2";
97 regulator-min-microvolt = <1200000>;
98 regulator-max-microvolt = <1200000>;
99 regulator-always-on;
100 regulator-boot-on;
103 transceiver1: can-phy0 {
105 #phy-cells = <0>;
106 max-bitrate = <5000000>;
109 transceiver2: can-phy1 {
111 #phy-cells = <0>;
112 max-bitrate = <5000000>;
115 transceiver3: can-phy2 {
117 #phy-cells = <0>;
118 max-bitrate = <5000000>;
121 transceiver4: can-phy3 {
123 #phy-cells = <0>;
124 max-bitrate = <5000000>;
127 connector-hdmi {
128 compatible = "hdmi-connector";
131 pinctrl-names = "default";
132 pinctrl-0 = <&hdmi_hpd_pins_default>;
133 ddc-i2c-bus = <&mcu_i2c1>;
135 hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
139 remote-endpoint = <&tfp410_out>;
144 bridge-dvi {
147 powerdown-gpios = <&exp2 0 GPIO_ACTIVE_LOW>;
151 #address-cells = <1>;
152 #size-cells = <0>;
158 remote-endpoint = <&dpi_out0>;
159 pclk-sample = <1>;
167 remote-endpoint = <&hdmi_connector_in>;
173 csi_mux: mux-controller {
174 compatible = "gpio-mux";
175 #mux-state-cells = <1>;
176 mux-gpios = <&exp3 1 GPIO_ACTIVE_HIGH>;
177 idle-state = <0>;
182 main_uart8_pins_default: main-uart8-default-pins {
183 pinctrl-single,pins = <
189 main_i2c0_pins_default: main-i2c0-default-pins {
190 pinctrl-single,pins = <
196 main_i2c1_pins_default: main-i2c1-default-pins {
197 pinctrl-single,pins = <
203 main_mmc1_pins_default: main-mmc1-default-pins {
204 pinctrl-single,pins = <
216 vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
217 pinctrl-single,pins = <
222 main_usbss0_pins_default: main-usbss0-default-pins {
223 pinctrl-single,pins = <
228 main_mcan6_pins_default: main-mcan6-default-pins {
229 pinctrl-single,pins = <
235 main_mcan7_pins_default: main-mcan7-default-pins {
236 pinctrl-single,pins = <
242 main_i2c4_pins_default: main-i2c4-default-pins {
243 pinctrl-single,pins = <
249 rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
250 pinctrl-single,pins = <
268 dss_vout0_pins_default: dss-vout0-default-pins {
269 pinctrl-single,pins = <
270 J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */
271 J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */
272 J721S2_IOPAD(0x04c, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */
273 J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */
274 J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y26) MCASP0_AXR1.VOUT0_DATA12 */
275 J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */
276 J721S2_IOPAD(0x03c, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */
277 J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */
278 J721S2_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */
279 J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */
280 J721S2_IOPAD(0x02c, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */
281 J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */
282 J721S2_IOPAD(0x07c, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */
283 J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */
284 J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */
285 J721S2_IOPAD(0x01c, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */
286 J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */
287 J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */
288 J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */
289 J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */
290 J721S2_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */
291 J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */
292 J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */
293 J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */
294 J721S2_IOPAD(0x084, PIN_OUTPUT, 2) /* (AA28) MCASP0_AXR5.VOUT0_DE */
295 J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */
296 J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */
297 J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VP0_VSYNC */
301 hdmi_hpd_pins_default: hdmi-hpd-default-pins {
302 pinctrl-single,pins = <
309 wkup_uart0_pins_default: wkup-uart0-default-pins {
310 pinctrl-single,pins = <
318 mcu_cpsw_pins_default: mcu-cpsw-default-pins {
319 pinctrl-single,pins = <
335 mcu_mdio_pins_default: mcu-mdio-default-pins {
336 pinctrl-single,pins = <
342 mcu_mcan0_pins_default: mcu-mcan0-default-pins {
343 pinctrl-single,pins = <
349 mcu_mcan1_pins_default: mcu-mcan1-default-pins {
350 pinctrl-single,pins = <
356 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
357 pinctrl-single,pins = <
363 mcu_i2c1_pins_default: mcu-i2c1-default-pins {
364 pinctrl-single,pins = <
370 mcu_uart0_pins_default: mcu-uart0-default-pins {
371 pinctrl-single,pins = <
377 mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
378 pinctrl-single,pins = <
393 mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 {
394 pinctrl-single,pins = <
402 pinctrl-names = "default";
403 pinctrl-0 = <&rpi_header_gpio0_pins_default>;
408 pinctrl-names = "default";
409 pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&wkup_uart0_pins_default>;
419 bootph-all;
420 clock-frequency = <400000>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&wkup_i2c0_pins_default>;
428 buck0-in-supply = <&vsys_3v3>;
429 buck1-in-supply = <&vsys_3v3>;
430 ldo0-in-supply = <&vsys_3v3>;
431 ldo1-in-supply = <&vsys_3v3>;
435 /* FB_B0 -> LP8733-BUCK1 - VDD_MCU_0V85 */
436 regulator-name = "lp8733-buck0";
437 regulator-min-microvolt = <850000>;
438 regulator-max-microvolt = <850000>;
439 regulator-always-on;
440 regulator-boot-on;
444 /* FB_B1 -> LP8733-BUCK2 - VDD_DDR_1V1 */
445 regulator-name = "lp8733-buck1";
446 regulator-min-microvolt = <1100000>;
447 regulator-max-microvolt = <1100000>;
448 regulator-always-on;
449 regulator-boot-on;
453 /* LDO0 -> LP8733-LDO1 - VDA_DLL_0V8 */
454 regulator-name = "lp8733-ldo0";
455 regulator-min-microvolt = <800000>;
456 regulator-max-microvolt = <800000>;
457 regulator-boot-on;
458 regulator-always-on;
462 /* LDO1 -> LP8733-LDO2 - VDA_LN_1V8 */
463 regulator-name = "lp8733-ldo1";
464 regulator-min-microvolt = <1800000>;
465 regulator-max-microvolt = <1800000>;
466 regulator-always-on;
467 regulator-boot-on;
475 bootph-pre-ram;
476 regulator-name = "VDD_CPU_AVS";
477 regulator-min-microvolt = <600000>;
478 regulator-max-microvolt = <900000>;
479 regulator-boot-on;
480 regulator-always-on;
486 regulator-name = "VDD_CORE_0V8";
487 regulator-min-microvolt = <800000>;
488 regulator-max-microvolt = <800000>;
489 regulator-boot-on;
490 regulator-always-on;
496 pinctrl-names = "default";
497 pinctrl-0 = <&mcu_uart0_pins_default>;
502 pinctrl-names = "default";
503 pinctrl-0 = <&main_uart8_pins_default>;
505 power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
509 pinctrl-names = "default";
510 pinctrl-0 = <&main_i2c0_pins_default>;
511 clock-frequency = <400000>;
516 gpio-controller;
517 #gpio-cells = <2>;
518 gpio-line-names = " ", " ", " ", " ", " ",
520 "GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz",
526 pinctrl-names = "default";
527 pinctrl-0 = <&main_i2c1_pins_default>;
533 gpio-controller;
534 #gpio-cells = <2>;
535 gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPn",
540 i2c-mux@70 {
542 #address-cells = <1>;
543 #size-cells = <0>;
547 #address-cells = <1>;
548 #size-cells = <0>;
553 #address-cells = <1>;
554 #size-cells = <0>;
563 pinctrl-names = "default";
564 pinctrl-0 = <&main_i2c4_pins_default>;
565 clock-frequency = <400000>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&mcu_i2c0_pins_default>;
572 clock-frequency = <400000>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&mcu_i2c1_pins_default>;
580 clock-frequency = <100000>;
585 gpio-controller;
586 #gpio-cells = <2>;
587 gpio-line-names = "HDMI_PDn","HDMI_LS_OE",
595 pinctrl-0 = <&main_mmc1_pins_default>;
596 pinctrl-names = "default";
597 disable-wp;
598 vmmc-supply = <&vdd_mmc1>;
599 vqmmc-supply = <&vdd_sd_dv>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
608 phy0: ethernet-phy@0 {
610 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
611 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
612 ti,min-output-impedance;
617 phy-mode = "rgmii-rxid";
618 phy-handle = <&phy0>;
623 pinctrl-names = "default";
624 pinctrl-0 = <&mcu_mcan0_pins_default>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&mcu_mcan1_pins_default>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&main_mcan6_pins_default>;
644 pinctrl-names = "default";
645 pinctrl-0 = <&main_mcan7_pins_default>;
651 pinctrl-names = "default";
652 pinctrl-0 = <&dss_vout0_pins_default>;
656 * VP0 - DisplayPort SST
657 * VP1 - DPI0
658 * VP2 - DSI
659 * VP3 - DPI1
661 assigned-clocks = <&k3_clks 158 2>,
665 assigned-clock-parents = <&k3_clks 158 3>,
672 #address-cells = <1>;
673 #size-cells = <0>;
680 remote-endpoint = <&tfp410_in>;
686 idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>,
691 clock-frequency = <100000000>;
699 cdns,num-lanes = <2>;
700 #phy-cells = <0>;
701 cdns,phy-type = <PHY_TYPE_PCIE>;
702 resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
705 serdes0_usb_link: phy@2 {
707 reg = <2>;
708 cdns,num-lanes = <1>;
709 #phy-cells = <0>;
710 cdns,phy-type = <PHY_TYPE_USB3>;
717 reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>;
719 phy-names = "pcie-phy";
720 num-lanes = <2>;
724 idle-states = <0>; /* USB0 to SERDES lane 2 */
729 pinctrl-0 = <&main_usbss0_pins_default>;
730 pinctrl-names = "default";
731 ti,vbus-divider;
736 maximum-speed = "super-speed";
738 phy-names = "cdns3,usb3-phy";