Lines Matching +full:0 +full:x8000

13 		#size-cells = <0>;
36 		cpu0: cpu@0 {
38 			reg = <0x000>;
41 			i-cache-size = <0x8000>;
44 			d-cache-size = <0x8000>;
52 			reg = <0x001>;
55 			i-cache-size = <0x8000>;
58 			d-cache-size = <0x8000>;
66 			reg = <0x100>;
69 			i-cache-size = <0x8000>;
72 			d-cache-size = <0x8000>;
80 			reg = <0x101>;
83 			i-cache-size = <0x8000>;
86 			d-cache-size = <0x8000>;
97 		cache-size = <0x80000>;
107 		cache-size = <0x80000>;