Lines Matching +full:tx0 +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2024
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/net/ti-dp83867.h>
36 stdout-path = "serial3:115200n8";
39 reserved-memory {
40 #address-cells = <2>;
41 #size-cells = <2>;
44 secure_ddr: secure-ddr@9e800000 {
45 reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
46 alignment = <0x1000>;
47 no-map;
50 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
51 compatible = "shared-dma-pool";
52 reg = <0 0xa0000000 0 0x100000>;
53 no-map;
56 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
57 compatible = "shared-dma-pool";
58 reg = <0 0xa0100000 0 0xf00000>;
59 no-map;
62 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
63 compatible = "shared-dma-pool";
64 reg = <0 0xa1000000 0 0x100000>;
65 no-map;
68 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
69 compatible = "shared-dma-pool";
70 reg = <0 0xa1100000 0 0xf00000>;
71 no-map;
74 rtos_ipc_memory_region: ipc-memories@a2000000 {
75 reg = <0x00 0xa2000000 0x00 0x00200000>;
76 alignment = <0x1000>;
77 no-map;
80 /* To reserve the power-on(PON) reason for watchdog reset */
81 wdt_reset_memory_region: wdt-memory@a2200000 {
82 reg = <0x00 0xa2200000 0x00 0x1000>;
83 no-map;
88 compatible = "gpio-leds";
89 pinctrl-names = "default";
90 pinctrl-0 = <&leds_pins_default>;
92 led-0 {
95 label = "status-led-red";
97 panic-indicator;
100 led-1 {
103 label = "status-led-green";
107 led-2 {
110 label = "user-led1-red";
114 led-3 {
117 label = "user-led1-green";
121 led-4 {
124 label = "user-led2-red";
128 led-5 {
131 label = "user-led2-green";
137 compatible = "fixed-clock";
138 #clock-cells = <0>;
139 clock-frequency = <19200000>;
142 /* Dual Ethernet application node on PRU-ICSSG0 */
143 icssg0_eth: icssg0-eth {
144 compatible = "ti,am654-icssg-prueth";
145 pinctrl-names = "default";
146 pinctrl-0 = <&icssg0_rgmii_pins_default>;
151 firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
152 "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
153 "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
154 "ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
155 "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
156 "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
158 ti,pruss-gp-mux-sel = <2>, /* MII mode */
165 ti,mii-g-rt = <&icssg0_mii_g_rt>;
166 ti,mii-rt = <&icssg0_mii_rt>;
169 interrupt-parent = <&icssg0_intc>;
170 interrupts = <24 0 2>, <25 1 3>;
171 interrupt-names = "tx_ts0", "tx_ts1";
173 dmas = <&main_udmap 0xc100>, /* egress slice 0 */
174 <&main_udmap 0xc101>, /* egress slice 0 */
175 <&main_udmap 0xc102>, /* egress slice 0 */
176 <&main_udmap 0xc103>, /* egress slice 0 */
177 <&main_udmap 0xc104>, /* egress slice 1 */
178 <&main_udmap 0xc105>, /* egress slice 1 */
179 <&main_udmap 0xc106>, /* egress slice 1 */
180 <&main_udmap 0xc107>, /* egress slice 1 */
181 <&main_udmap 0x4100>, /* ingress slice 0 */
182 <&main_udmap 0x4101>; /* ingress slice 1 */
183 dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
184 "tx1-0", "tx1-1", "tx1-2", "tx1-3",
187 ethernet-ports {
188 #address-cells = <1>;
189 #size-cells = <0>;
190 icssg0_emac0: port@0 {
191 reg = <0>;
192 phy-handle = <&icssg0_eth0_phy>;
193 phy-mode = "rgmii-id";
194 ti,syscon-rgmii-delay = <&scm_conf 0x4100>;
195 ti,half-duplex-capable;
197 local-mac-address = [00 00 00 00 00 00];
202 phy-handle = <&icssg0_eth1_phy>;
203 phy-mode = "rgmii-id";
204 ti,syscon-rgmii-delay = <&scm_conf 0x4104>;
205 ti,half-duplex-capable;
207 local-mac-address = [00 00 00 00 00 00];
214 mcu_i2c0_pins_default: mcu-i2c0-default-pins {
215 pinctrl-single,pins = <
217 AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0)
219 AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0)
223 push_button_pins_default: push-button-default-pins {
224 pinctrl-single,pins = <
226 AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7)
230 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
231 pinctrl-single,pins = <
233 AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0)
235 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)
237 AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)
239 AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)
241 AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0)
245 db9_com_mode_pins_default: db9-com-mode-default-pins {
246 pinctrl-single,pins = <
247 /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */
248 AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7)
250 AM65X_WKUP_IOPAD(0x00c0, PIN_OUTPUT, 7)
252 AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 7)
254 AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7)
258 leds_pins_default: leds-default-pins {
259 pinctrl-single,pins = <
261 AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7)
263 AM65X_WKUP_IOPAD(0x0028, PIN_OUTPUT, 7)
265 AM65X_WKUP_IOPAD(0x0030, PIN_OUTPUT, 7)
267 AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7)
271 mcu_spi0_pins_default: mcu-spi0-default-pins {
272 pinctrl-single,pins = <
274 AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0)
276 AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0)
278 AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0)
280 AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0)
284 minipcie_pins_default: minipcie-default-pins {
285 pinctrl-single,pins = <
287 AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7)
293 main_pcie_enable_pins_default: main-pcie-enable-default-pins {
294 pinctrl-single,pins = <
295 AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */
299 main_uart1_pins_default: main-uart1-default-pins {
300 pinctrl-single,pins = <
301 AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */
302 AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */
303 AM65X_IOPAD(0x0178, PIN_INPUT, 6) /* (AD22) UART1_CTSn */
304 AM65X_IOPAD(0x017c, PIN_OUTPUT, 6) /* (AC21) UART1_RTSn */
308 main_i2c3_pins_default: main-i2c3-default-pins {
309 pinctrl-single,pins = <
310 AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */
311 AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */
315 main_mmc1_pins_default: main-mmc1-default-pins {
316 pinctrl-single,pins = <
317 AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
318 AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
319 AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
320 AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
321 AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
322 AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
323 AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
324 AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP, 0) /* (C24) MMC1_SDWP */
328 usb0_pins_default: usb0-default-pins {
329 pinctrl-single,pins = <
330 AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
334 usb1_pins_default: usb1-default-pins {
335 pinctrl-single,pins = <
336 AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
340 main_i2c2_pins_default: main-i2c2-default-pins {
341 pinctrl-single,pins = <
342 AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */
343 AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */
347 icssg0_mdio_pins_default: icssg0-mdio-default-pins {
348 pinctrl-single,pins = <
349 AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */
350 AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */
354 icssg0_rgmii_pins_default: icssg0-rgmii-default-pins {
355 pinctrl-single,pins = <
356 AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
357 AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
358 AM65X_IOPAD(0x024c, PIN_INPUT, 2) /* (AC27) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
359 AM65X_IOPAD(0x0250, PIN_INPUT, 2) /* (AB26) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
360 AM65X_IOPAD(0x0274, PIN_OUTPUT, 2) /* (AC25) PRG0_PRU1_GPO12.PRG0_RGMII2_TD0 */
361 AM65X_IOPAD(0x0278, PIN_OUTPUT, 2) /* (AD25) PRG0_PRU1_GPO13.PRG0_RGMII2_TD1 */
362 AM65X_IOPAD(0x027c, PIN_OUTPUT, 2) /* (AD24) PRG0_PRU1_GPO14.PRG0_RGMII2_TD2 */
363 AM65X_IOPAD(0x0280, PIN_OUTPUT, 2) /* (AE27) PRG0_PRU1_GPO15.PRG0_RGMII2_TD3 */
364 AM65X_IOPAD(0x0284, PIN_INPUT, 2) /* (AC24) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
365 AM65X_IOPAD(0x0270, PIN_OUTPUT, 2) /* (AB24) PRG0_PRU1_GPO11.PRG0_RGMII2_TX_CTL */
366 AM65X_IOPAD(0x025c, PIN_INPUT, 2) /* (AB27) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
367 AM65X_IOPAD(0x0254, PIN_INPUT, 2) /* (AA25) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
369 AM65X_IOPAD(0x01f4, PIN_INPUT, 2) /* (V24) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
370 AM65X_IOPAD(0x01f8, PIN_INPUT, 2) /* (W25) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
371 AM65X_IOPAD(0x01fc, PIN_INPUT, 2) /* (W24) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
372 AM65X_IOPAD(0x0200, PIN_INPUT, 2) /* (AA27) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
373 AM65X_IOPAD(0x0224, PIN_OUTPUT, 2) /* (AD27) PRG0_PRU0_GPO12.PRG0_RGMII1_TD0 */
374 AM65X_IOPAD(0x0228, PIN_OUTPUT, 2) /* (AC26) PRG0_PRU0_GPO13.PRG0_RGMII1_TD1 */
375 AM65X_IOPAD(0x022c, PIN_OUTPUT, 2) /* (AD26) PRG0_PRU0_GPO14.PRG0_RGMII1_TD2 */
376 AM65X_IOPAD(0x0230, PIN_OUTPUT, 2) /* (AA24) PRG0_PRU0_GPO15.PRG0_RGMII1_TD3 */
377 AM65X_IOPAD(0x0234, PIN_INPUT, 2) /* (AD28) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
378 AM65X_IOPAD(0x0220, PIN_OUTPUT, 2) /* (AB25) PRG0_PRU0_GPO11.PRG0_RGMII1_TX_CTL */
379 AM65X_IOPAD(0x020c, PIN_INPUT, 2) /* (Y25) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
380 AM65X_IOPAD(0x0204, PIN_INPUT, 2) /* (Y24) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
386 main_i2c0_pins_default: main-i2c0-default-pins {
387 pinctrl-single,pins = <
388 AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
389 AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
393 main_i2c1_pins_default: main-i2c1-default-pins {
394 pinctrl-single,pins = <
395 AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
396 AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
408 pinctrl-names = "default";
409 pinctrl-0 = <&main_uart1_pins_default>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&main_pcie_enable_pins_default>;
419 pinctrl-names = "default";
420 pinctrl-0 = <&mcu_i2c0_pins_default>;
421 clock-frequency = <400000>;
425 reg = <0x60>;
426 regulator-name = "tps62363-vout";
427 regulator-min-microvolt = <500000>;
428 regulator-max-microvolt = <1500000>;
429 regulator-boot-on;
430 ti,vsel0-state-high;
431 ti,vsel1-state-high;
432 ti,enable-vout-discharge;
438 pinctrl-names = "default";
439 pinctrl-0 = <&main_i2c0_pins_default>;
440 clock-frequency = <400000>;
444 reg = <0x51>;
449 reg = <0x54>;
456 pinctrl-names = "default";
457 pinctrl-0 = <&main_i2c1_pins_default>;
458 clock-frequency = <400000>;
463 pinctrl-names = "default";
464 pinctrl-0 = <&main_i2c2_pins_default>;
465 clock-frequency = <400000>;
470 pinctrl-names = "default";
471 pinctrl-0 = <&main_i2c3_pins_default>;
472 clock-frequency = <400000>;
474 #address-cells = <1>;
475 #size-cells = <0>;
484 pinctrl-names = "default";
485 pinctrl-0 = <&main_mmc1_pins_default>;
486 ti,driver-strength-ohm = <50>;
487 disable-wp;
491 pinctrl-names = "default";
492 pinctrl-0 = <&usb0_pins_default>;
497 pinctrl-names = "default";
498 pinctrl-0 = <&usb1_pins_default>;
504 #address-cells = <1>;
505 #size-cells = <0>;
506 ti,pindir-d0-out-d1-in;
511 pinctrl-names = "default";
512 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
514 flash@0 {
515 compatible = "jedec,spi-nor";
516 reg = <0x0>;
517 spi-tx-bus-width = <1>;
518 spi-rx-bus-width = <1>;
519 spi-max-frequency = <50000000>;
520 cdns,tshsl-ns = <60>;
521 cdns,tsd2d-ns = <60>;
522 cdns,tchsh-ns = <60>;
523 cdns,tslch-ns = <60>;
524 cdns,read-delay = <2>;
527 compatible = "fixed-partitions";
528 #address-cells = <1>;
529 #size-cells = <1>;
531 seboot@0 {
533 reg = <0x0 0x180000>; /* 1.5M */
538 reg = <0x180000 0x200000>; /* 2M */
541 u-boot@380000 {
542 label = "u-boot";
543 reg = <0x380000 0x300000>; /* 3M */
548 reg = <0x680000 0x20000>; /* 128K */
551 env-backup@6a0000 {
553 reg = <0x6a0000 0x20000>; /* 128K */
558 reg = <0x6c0000 0x10000>; /* 64K */
563 reg = <0x6d0000 0x7b0000>; /* 7872K */
566 seboot-backup@e80000 {
568 reg = <0xe80000 0x180000>; /* 1.5M */
576 pinctrl-names = "default";
577 pinctrl-0 = <&minipcie_pins_default>;
579 num-lanes = <1>;
580 phys = <&serdes1 PHY_TYPE_PCIE 0>;
581 phy-names = "pcie-phy0";
582 reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
589 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
590 ti,mbox-tx = <1 0 0>;
591 ti,mbox-rx = <0 0 0>;
599 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
600 ti,mbox-tx = <1 0 0>;
601 ti,mbox-rx = <0 0 0>;
606 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
612 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
618 memory-region = <&wdt_reset_memory_region>;
623 pinctrl-names = "default";
624 pinctrl-0 = <&icssg0_mdio_pins_default>;
626 icssg0_eth0_phy: ethernet-phy@0 {
627 reg = <0>;
628 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
629 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
632 #address-cells = <1>;
633 #size-cells = <0>;
635 led@0 {
636 reg = <0>;
655 icssg0_eth1_phy: ethernet-phy@1 {
657 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
658 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
661 #address-cells = <1>;
662 #size-cells = <0>;
664 led@0 {
665 reg = <0>;
686 /* lock-step mode not supported on iot2050 boards */
687 ti,cluster-mode = <0>;