Lines Matching +full:quartz +full:- +full:load +full:- +full:femtofarads
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
35 compatible = "shared-dma-pool";
37 no-map;
40 main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
41 compatible = "shared-dma-pool";
43 no-map;
46 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
47 compatible = "shared-dma-pool";
49 no-map;
52 main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
53 compatible = "shared-dma-pool";
55 no-map;
58 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
59 compatible = "shared-dma-pool";
61 no-map;
64 main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
65 compatible = "shared-dma-pool";
67 no-map;
70 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
71 compatible = "shared-dma-pool";
73 no-map;
76 main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
77 compatible = "shared-dma-pool";
79 no-map;
82 rtos_ipc_memory_region: ipc-memories@a5000000 {
85 no-map;
89 reg_1v8: regulator-1v8 {
90 compatible = "regulator-fixed";
91 regulator-name = "V_1V8";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 regulator-always-on;
95 regulator-boot-on;
100 pinctrl-names = "default";
101 pinctrl-0 = <&main_i2c0_pins>;
102 clock-frequency = <400000>;
105 tmp1075: temperature-sensor@4a {
108 vs-supply = <®_1v8>;
114 vcc-supply = <®_1v8>;
116 read-only;
122 quartz-load-femtofarads = <12500>;
128 vcc-supply = <®_1v8>;
136 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
137 ti,mbox-rx = <0 0 2>;
138 ti,mbox-tx = <1 0 2>;
141 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
142 ti,mbox-rx = <2 0 2>;
143 ti,mbox-tx = <3 0 2>;
150 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
151 ti,mbox-rx = <0 0 2>;
152 ti,mbox-tx = <1 0 2>;
155 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
156 ti,mbox-rx = <2 0 2>;
157 ti,mbox-tx = <3 0 2>;
164 mbox_m4_0: mbox-m4-0 {
165 ti,mbox-rx = <0 0 2>;
166 ti,mbox-tx = <1 0 2>;
172 memory-region = <&main_r5fss0_core0_dma_memory_region>,
178 memory-region = <&main_r5fss0_core1_dma_memory_region>,
184 memory-region = <&main_r5fss1_core0_dma_memory_region>,
190 memory-region = <&main_r5fss1_core1_dma_memory_region>,
196 pinctrl-names = "default";
197 pinctrl-0 = <&ospi0_pins>;
200 compatible = "jedec,spi-nor";
202 spi-tx-bus-width = <8>;
203 spi-rx-bus-width = <8>;
204 spi-max-frequency = <84000000>;
205 cdns,tshsl-ns = <60>;
206 cdns,tsd2d-ns = <60>;
207 cdns,tchsh-ns = <60>;
208 cdns,tslch-ns = <60>;
209 cdns,read-delay = <2>;
212 compatible = "fixed-partitions";
213 #address-cells = <1>;
214 #size-cells = <1>;
223 non-removable;
224 disable-wp;
225 no-sdio;
226 no-sd;
227 ti,driver-strength-ohm = <50>;
231 main_i2c0_pins: main-i2c0-pins {
232 pinctrl-single,pins = <
240 ospi0_pins: ospi0-pins {
241 pinctrl-single,pins = <