dts/ti/k3-am642-sk.dts

1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3  * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/leds/common.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 	compatible = "ti,am642-sk", "ti,am642";
21 		stdout-path = &main_uart0;
37 		bootph-pre-ram;
43 	reserved-memory {
44 		#address-cells = <2>;
45 		#size-cells = <2>;
49 			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
51 			no-map;
54 		main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
55 			compatible = "shared-dma-pool";
57 			no-map;
60 		main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
61 			compatible = "shared-dma-pool";
63 			no-map;
66 		main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
67 			compatible = "shared-dma-pool";
69 			no-map;
72 		main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
73 			compatible = "shared-dma-pool";
75 			no-map;
78 		main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
79 			compatible = "shared-dma-pool";
81 			no-map;
84 		main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
85 			compatible = "shared-dma-pool";
87 			no-map;
90 		main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
91 			compatible = "shared-dma-pool";
93 			no-map;
96 		main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
97 			compatible = "shared-dma-pool";
99 			no-map;
102 		rtos_ipc_memory_region: ipc-memories@a5000000 {
105 			no-map;
109 	vusb_main: regulator-0 {
111 		bootph-all;
112 		compatible = "regulator-fixed";
113 		regulator-name = "vusb_main5v0";
114 		regulator-min-microvolt = <5000000>;
115 		regulator-max-microvolt = <5000000>;
116 		regulator-always-on;
117 		regulator-boot-on;
120 	vcc_3v3_sys: regulator-1 {
122 		bootph-all;
123 		compatible = "regulator-fixed";
124 		regulator-name = "vcc_3v3_sys";
125 		regulator-min-microvolt = <3300000>;
126 		regulator-max-microvolt = <3300000>;
127 		vin-supply = <&vusb_main>;
128 		regulator-always-on;
129 		regulator-boot-on;
132 	vdd_mmc1: regulator-2 {
134 		bootph-all;
135 		compatible = "regulator-fixed";
136 		regulator-name = "vdd_mmc1";
137 		regulator-min-microvolt = <3300000>;
138 		regulator-max-microvolt = <3300000>;
139 		regulator-boot-on;
140 		enable-active-high;
141 		vin-supply = <&vcc_3v3_sys>;
145 	com8_ls_en: regulator-3 {
146 		compatible = "regulator-fixed";
147 		regulator-name = "com8_ls_en";
148 		regulator-min-microvolt = <3300000>;
149 		regulator-max-microvolt = <3300000>;
150 		regulator-always-on;
151 		regulator-boot-on;
152 		pinctrl-0 = <&main_com8_ls_en_pins_default>;
153 		pinctrl-names = "default";
157 	wlan_en: regulator-4 {
159 		compatible = "regulator-fixed";
160 		regulator-name = "wlan_en";
161 		regulator-min-microvolt = <1800000>;
162 		regulator-max-microvolt = <1800000>;
163 		enable-active-high;
164 		pinctrl-0 = <&main_wlan_en_pins_default>;
165 		pinctrl-names = "default";
166 		vin-supply = <&com8_ls_en>;
170 	led-controller {
171 		compatible = "gpio-leds";
173 		led-0 {
176 			function-enumerator = <1>;
178 			default-state = "off";
181 		led-1 {
184 			function-enumerator = <2>;
186 			default-state = "off";
189 		led-2 {
192 			function-enumerator = <3>;
194 			default-state = "off";
197 		led-3 {
200 			function-enumerator = <4>;
202 			default-state = "off";
205 		led-4 {
208 			function-enumerator = <5>;
210 			default-state = "off";
213 		led-5 {
216 			function-enumerator = <6>;
218 			default-state = "off";
221 		led-6 {
224 			function-enumerator = <7>;
226 			default-state = "off";
229 		led-7 {
232 			function-enumerator = <8>;
233 			linux,default-trigger = "heartbeat";
240 	main_mmc1_pins_default: main-mmc1-default-pins {
241 		bootph-all;
242 		pinctrl-single,pins = <
255 	main_uart0_pins_default: main-uart0-default-pins {
256 		bootph-all;
257 		pinctrl-single,pins = <
265 	main_uart1_pins_default: main-uart1-default-pins {
266 		bootph-pre-ram;
267 		pinctrl-single,pins = <
275 	main_usb0_pins_default: main-usb0-default-pins {
276 		bootph-all;
277 		pinctrl-single,pins = <
282 	main_i2c0_pins_default: main-i2c0-default-pins {
283 		bootph-all;
284 		pinctrl-single,pins = <
290 	main_i2c1_pins_default: main-i2c1-default-pins {
291 		bootph-all;
292 		pinctrl-single,pins = <
298 	mdio1_pins_default: mdio1-default-pins {
299 		pinctrl-single,pins = <
305 	rgmii1_pins_default: rgmii1-default-pins {
306 		pinctrl-single,pins = <
322        rgmii2_pins_default: rgmii2-default-pins {
323 		pinctrl-single,pins = <
339 	ospi0_pins_default: ospi0-default-pins {
340 		pinctrl-single,pins = <
355 	main_ecap0_pins_default: main-ecap0-default-pins {
356 		pinctrl-single,pins = <
360 	main_wlan_en_pins_default: main-wlan-en-default-pins {
361 		pinctrl-single,pins = <
366 	main_com8_ls_en_pins_default: main-com8-ls-en-default-pins {
367 		pinctrl-single,pins = <
372 	main_wlan_pins_default: main-wlan-default-pins {
373 		pinctrl-single,pins = <
380 	bootph-all;
382 	pinctrl-names = "default";
383 	pinctrl-0 = <&main_uart0_pins_default>;
388 	bootph-pre-ram;
390 	pinctrl-names = "default";
391 	pinctrl-0 = <&main_uart1_pins_default>;
395 	bootph-all;
397 	pinctrl-names = "default";
398 	pinctrl-0 = <&main_i2c0_pins_default>;
399 	clock-frequency = <400000>;
408 	bootph-all;
410 	pinctrl-names = "default";
411 	pinctrl-0 = <&main_i2c1_pins_default>;
412 	clock-frequency = <400000>;
415 		bootph-all;
418 		gpio-controller;
419 		#gpio-cells = <2>;
420 		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
429 		gpio-controller;
430 		#gpio-cells = <2>;
431 		gpio-line-names = "LED1","LED2","LED3","LED4","LED5","LED6","LED7","LED8";
458 	vmmc-supply = <&wlan_en>;
459 	bus-width = <4>;
460 	non-removable;
461 	cap-power-off-card;
462 	keep-power-in-suspend;
463 	ti,driver-strength-ohm = <50>;
465 	#address-cells = <1>;
466 	#size-cells = <0>;
470 		pinctrl-0 = <&main_wlan_pins_default>;
471 		pinctrl-names = "default";
472 		interrupt-parent = <&main_gpio0>;
479 	bootph-all;
481 	vmmc-supply = <&vdd_mmc1>;
482 	pinctrl-names = "default";
483 	pinctrl-0 = <&main_mmc1_pins_default>;
484 	disable-wp;
488 	bootph-all;
489 	idle-states = <AM64_SERDES0_LANE0_USB>;
493 	bootph-all;
497 	bootph-all;
501 	bootph-all;
503 		bootph-all;
505 		cdns,num-lanes = <1>;
506 		#phy-cells = <0>;
507 		cdns,phy-type = <PHY_TYPE_USB3>;
513 	bootph-all;
514 	ti,vbus-divider;
518 	bootph-all;
520 	maximum-speed = "super-speed";
521 	pinctrl-names = "default";
522 	pinctrl-0 = <&main_usb0_pins_default>;
524 	phy-names = "cdns3,usb3-phy";
528 	pinctrl-names = "default";
529 	pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
534 	phy-mode = "rgmii-rxid";
535 	phy-handle = <&cpsw3g_phy0>;
540 	phy-mode = "rgmii-rxid";
541 	phy-handle = <&cpsw3g_phy1>;
547 	pinctrl-names = "default";
548 	pinctrl-0 = <&mdio1_pins_default>;
550 	cpsw3g_phy0: ethernet-phy@0 {
552 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
553 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
556 	cpsw3g_phy1: ethernet-phy@1 {
558 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
559 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
565 	pinctrl-names = "default";
566 	pinctrl-0 = <&ospi0_pins_default>;
569 		compatible = "jedec,spi-nor";
571 		spi-tx-bus-width = <8>;
572 		spi-rx-bus-width = <8>;
573 		spi-max-frequency = <25000000>;
574 		cdns,tshsl-ns = <60>;
575 		cdns,tsd2d-ns = <60>;
576 		cdns,tchsh-ns = <60>;
577 		cdns,tslch-ns = <60>;
578 		cdns,read-delay = <4>;
581 			compatible = "fixed-partitions";
582 			#address-cells = <1>;
583 			#size-cells = <1>;
596 				label = "ospi.u-boot";
626 	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
627 		ti,mbox-rx = <0 0 2>;
628 		ti,mbox-tx = <1 0 2>;
631 	mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
632 		ti,mbox-rx = <2 0 2>;
633 		ti,mbox-tx = <3 0 2>;
640 	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
641 		ti,mbox-rx = <0 0 2>;
642 		ti,mbox-tx = <1 0 2>;
645 	mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
646 		ti,mbox-rx = <2 0 2>;
647 		ti,mbox-tx = <3 0 2>;
654 	mbox_m4_0: mbox-m4-0 {
655 		ti,mbox-rx = <0 0 2>;
656 		ti,mbox-tx = <1 0 2>;
662 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
668 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
674 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
680 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
687 	pinctrl-names = "default";
688 	pinctrl-0 = <&main_ecap0_pins_default>;