Lines Matching +full:0 +full:x8000
16 #size-cells = <0>;
38 cpu0: cpu@0 {
40 reg = <0x000>;
43 i-cache-size = <0x8000>;
46 d-cache-size = <0x8000>;
50 clocks = <&k3_clks 135 0>;
55 reg = <0x001>;
58 i-cache-size = <0x8000>;
61 d-cache-size = <0x8000>;
65 clocks = <&k3_clks 136 0>;
70 reg = <0x002>;
73 i-cache-size = <0x8000>;
76 d-cache-size = <0x8000>;
80 clocks = <&k3_clks 137 0>;
85 reg = <0x003>;
88 i-cache-size = <0x8000>;
91 d-cache-size = <0x8000>;
95 clocks = <&k3_clks 138 0>;
103 cache-size = <0x80000>;