dts/st/stm32mp25-pinctrl.dtsi

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 	eth2_rgmii_pins_a: eth2-rgmii-0 {
13 				 <STM32_PINMUX('C', 9, AF10)>, /* ETH_RGMII_TXD2 */
16 			bias-disable;
17 			drive-push-pull;
18 			slew-rate = <3>;
24 			bias-disable;
25 			drive-push-pull;
26 			slew-rate = <3>;
30 			bias-disable;
31 			drive-push-pull;
32 			slew-rate = <0>;
35 			pinmux = <STM32_PINMUX('G', 0, AF10)>, /* ETH_RGMII_RXD0 */
37 				 <STM32_PINMUX('F', 9, AF10)>, /* ETH_RGMII_RXD2 */
40 			bias-disable;
44 			bias-disable;
48 	eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
52 				 <STM32_PINMUX('C', 9, ANALOG)>, /* ETH_RGMII_TXD2 */
59 				 <STM32_PINMUX('G', 0, ANALOG)>, /* ETH_RGMII_RXD0 */
61 				 <STM32_PINMUX('F', 9, ANALOG)>, /* ETH_RGMII_RXD2 */
68 	i2c2_pins_a: i2c2-0 {
72 			bias-disable;
73 			drive-open-drain;
74 			slew-rate = <0>;
78 	i2c2_sleep_pins_a: i2c2-sleep-0 {
85 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
89 				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
92 			slew-rate = <2>;
93 			drive-push-pull;
94 			bias-disable;
98 			slew-rate = <3>;
99 			drive-push-pull;
100 			bias-disable;
104 	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
108 				 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
110 			slew-rate = <2>;
111 			drive-push-pull;
112 			bias-disable;
116 			slew-rate = <3>;
117 			drive-push-pull;
118 			bias-disable;
122 			slew-rate = <2>;
123 			drive-open-drain;
124 			bias-disable;
128 	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
132 				 <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */
139 	spi3_pins_a: spi3-0 {
143 			drive-push-pull;
144 			bias-disable;
145 			slew-rate = <1>;
149 			bias-disable;
153 	spi3_sleep_pins_a: spi3-sleep-0 {
161 	usart2_pins_a: usart2-0 {
163 			pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
164 			bias-disable;
165 			drive-push-pull;
166 			slew-rate = <0>;
169 			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
170 			bias-disable;
174 	usart2_idle_pins_a: usart2-idle-0 {
176 			pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
179 			pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
180 			bias-disable;
184 	usart2_sleep_pins_a: usart2-sleep-0 {
186 			pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
187 				 <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
191 	usart6_pins_a: usart6-0 {
195 			bias-disable;
196 			drive-push-pull;
197 			slew-rate = <0>;
202 			bias-pull-up;
206 	usart6_idle_pins_a: usart6-idle-0 {
213 			bias-disable;
214 			drive-push-pull;
215 			slew-rate = <0>;
219 			bias-pull-up;
223 	usart6_sleep_pins_a: usart6-sleep-0 {
234 	i2c8_pins_a: i2c8-0 {
236 			pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */
237 				 <STM32_PINMUX('Z', 3, AF8)>; /* I2C8_SDA */
238 			bias-disable;
239 			drive-open-drain;
240 			slew-rate = <0>;
244 	i2c8_sleep_pins_a: i2c8-sleep-0 {
246 			pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */
247 				 <STM32_PINMUX('Z', 3, ANALOG)>; /* I2C8_SDA */
253 	spi8_pins_a: spi8-0 {
255 			pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
256 				 <STM32_PINMUX('Z', 0, AF3)>; /* SPI8_MOSI */
257 			drive-push-pull;
258 			bias-disable;
259 			slew-rate = <1>;
262 			pinmux = <STM32_PINMUX('Z', 1, AF3)>; /* SPI8_MISO */
263 			bias-disable;
267 	spi8_sleep_pins_a: spi8-sleep-0 {
269 			pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */
270 				 <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI8_MOSI */
271 				 <STM32_PINMUX('Z', 1, ANALOG)>; /* SPI8_MISO */