dts/rockchip/rk3588-ok3588-c.dts

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include "rk3588-fet3588-c.dtsi"
7 	model = "Forlinx OK3588-C Board";
8 	compatible = "forlinx,ok3588-c", "forlinx,fet3588-c", "rockchip,rk3588";
16 	adc-keys-0 {
17 		compatible = "adc-keys";
18 		io-channels = <&saradc 0>;
19 		io-channel-names = "buttons";
20 		keyup-threshold-microvolt = <1800000>;
21 		poll-interval = <100>;
23 		button-maskrom {
26 			press-threshold-microvolt = <400>;
30 	adc-keys-1 {
31 		compatible = "adc-keys";
32 		io-channels = <&saradc 1>;
33 		io-channel-names = "buttons";
34 		keyup-threshold-microvolt = <1800000>;
35 		poll-interval = <100>;
37 		button-volume-up {
40 			press-threshold-microvolt = <17000>;
43 		button-volume-down {
44 			label = "V-";
46 			press-threshold-microvolt = <417000>;
49 		button-menu {
52 			press-threshold-microvolt = <890000>;
55 		button-escape {
58 			press-threshold-microvolt = <1235000>;
62 	fan: pwm-fan {  label
63 		compatible = "pwm-fan";
64 		cooling-levels = <0 95 145 195 255>;
65 		fan-supply = <&vcc12v_dcin>;
67 		#cooling-cells = <2>;
71 		compatible = "simple-audio-card";
72 		pinctrl-names = "default";
73 		pinctrl-0 = <&hp_detect>;
74 		simple-audio-card,name = "RK3588 OK3588-C Audio";
75 		simple-audio-card,bitclock-master = <&masterdai>;
76 		simple-audio-card,format = "i2s";
77 		simple-audio-card,frame-master = <&masterdai>;
78 		simple-audio-card,hp-det-gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
79 		simple-audio-card,mclk-fs = <256>;
80 		simple-audio-card,pin-switches = "Headphones", "Speaker";
81 		simple-audio-card,widgets =
86 		simple-audio-card,routing =
94 		simple-audio-card,cpu {
95 			sound-dai = <&i2s0_8ch>;
98 		masterdai: simple-audio-card,codec {
99 			sound-dai = <&nau8822>;
103 	vcc12v_dcin: vcc12v-dcin-regulator {
104 		compatible = "regulator-fixed";
105 		regulator-name = "vcc12v_dcin";
106 		regulator-always-on;
107 		regulator-boot-on;
108 		regulator-min-microvolt = <12000000>;
109 		regulator-max-microvolt = <12000000>;
112 	vcc1v8_sys: vcc1v8-sys-regulator {
113 		compatible = "regulator-fixed";
114 		regulator-name = "vcc1v8_sys";
115 		regulator-always-on;
116 		regulator-boot-on;
117 		regulator-min-microvolt = <1800000>;
118 		regulator-max-microvolt = <1800000>;
119 		vin-supply = <&vcc3v3_sys>;
122 	vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
123 		compatible = "regulator-fixed";
124 		regulator-name = "vcc3v3_pcie2x1l0";
125 		regulator-min-microvolt = <3300000>;
126 		regulator-max-microvolt = <3300000>;
127 		startup-delay-us = <50000>;
128 		vin-supply = <&vcc5v0_sys>;
131 	vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
132 		compatible = "regulator-fixed";
133 		regulator-name = "vcc3v3_pcie2x1l2";
134 		regulator-min-microvolt = <3300000>;
135 		regulator-max-microvolt = <3300000>;
136 		startup-delay-us = <5000>;
137 		vin-supply = <&vcc5v0_sys>;
140 	vcc3v3_pcie30: vcc3v3_pcie30-regulator {
141 		compatible = "regulator-fixed";
142 		regulator-name = "vcc3v3_pcie30";
143 		regulator-always-on;
144 		regulator-boot-on;
145 		regulator-min-microvolt = <3300000>;
146 		regulator-max-microvolt = <3300000>;
147 		vin-supply = <&vcc5v0_sys>;
150 	vcc3v3_sys: vcc3v3-sys-regulator {
151 		compatible = "regulator-fixed";
152 		regulator-name = "vcc3v3_sys";
153 		regulator-always-on;
154 		regulator-boot-on;
155 		regulator-min-microvolt = <3300000>;
156 		regulator-max-microvolt = <3300000>;
157 		vin-supply = <&vcc5v0_sys>;
160 	vcc5v0_sys: vcc5v0-sys-regulator {
161 		compatible = "regulator-fixed";
162 		regulator-name = "vcc5v0_sys";
163 		regulator-always-on;
164 		regulator-boot-on;
165 		regulator-min-microvolt = <5000000>;
166 		regulator-max-microvolt = <5000000>;
167 		vin-supply = <&vcc12v_dcin>;
173 	phy-handle = <&rgmii_phy0>;
174 	phy-mode = "rgmii-rxid";
175 	pinctrl-names = "default";
176 	pinctrl-0 = <&gmac0_miim
188 	phy-handle = <&rgmii_phy1>;
189 	phy-mode = "rgmii-rxid";
190 	pinctrl-names = "default";
191 	pinctrl-0 = <&gmac1_miim
202 	mali-supply = <&vdd_gpu_s0>;
212 		gpio-controller;
213 		#gpio-cells = <2>;
215 		interrupt-parent = <&gpio1>;
217 		interrupt-controller;
218 		#interrupt-cells = <2>;
220 		pinctrl-names = "default";
221 		pinctrl-0 = <&tca6424a_int>;
222 		vcc-supply = <&vcc3v3_sys>;
228 	pinctrl-names = "default";
229 	pinctrl-0 = <&i2c5m2_xfer>;
240 	nau8822: audio-codec@1a {
244 		clock-names = "mclk";
245 		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
246 		assigned-clock-rates = <12288000>;
247 		#sound-dai-cells = <0>;
252 	pinctrl-names = "default";
253 	pinctrl-0 = <&i2s0_lrck
262 	rgmii_phy0: ethernet-phy@1 {
264 		compatible = "ethernet-phy-id001c.c916";
266 		pinctrl-names = "default";
267 		pinctrl-0 = <&rtl8211f_0_rst>;
268 		reset-assert-us = <20000>;
269 		reset-deassert-us = <100000>;
270 		reset-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
275 	rgmii_phy1: ethernet-phy@2 {
277 		compatible = "ethernet-phy-id001c.c916";
279 		pinctrl-names = "default";
280 		pinctrl-0 = <&rtl8211f_1_rst>;
281 		reset-assert-us = <20000>;
282 		reset-deassert-us = <100000>;
283 		reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>;
288 	pinctrl-names = "default";
289 	pinctrl-0 = <&pcie2_0_rst>;
290 	reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
291 	vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
296 	pinctrl-names = "default";
297 	pinctrl-0 = <&pcie2_2_rst>;
298 	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
299 	vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
308 	pinctrl-names = "default";
309 	pinctrl-0 = <&pcie3_rst>;
310 	reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
311 	vpcie3v3-supply = <&vcc3v3_pcie30>;
317 		pcie2_0_rst: pcie2-0-rst {
321 		pcie2_2_rst: pcie2-2-rst {
327 		pcie3_rst: pcie3-rst {
333 		rtl8211f_0_rst: rtl8211f-0-rst {
336 		rtl8211f_1_rst: rtl8211f-1-rst {
342 		hp_detect: hp-detect {
348 		tca6424a_int: tca6424a-int {
359 	vref-supply = <&avcc_1v8_s0>;
364 	bus-width = <4>;
365 	cap-mmc-highspeed;
366 	cap-sd-highspeed;
367 	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
368 	disable-wp;
369 	max-frequency = <150000000>;
370 	no-sdio;
371 	no-mmc;
372 	sd-uhs-sdr104;
373 	vqmmc-supply = <&vccio_sd_s0>;