Lines Matching full:pmucru

452 	pmucru: clock-controller@fdd00000 {  label
453 		compatible = "rockchip,rk3568-pmucru";
466 		assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
468 		assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>;
476 		clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>;
489 		clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>;
502 		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
513 		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
524 		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
535 		clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>;
860 			 <&pmucru CLK_HDMI_REF>,
1758 		clocks = <&pmucru CLK_PCIEPHY1_REF>,
1762 		assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
1774 		clocks = <&pmucru CLK_PCIEPHY2_REF>,
1778 		assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
1803 		clocks = <&pmucru CLK_MIPIDSIPHY0_REF>, <&cru PCLK_MIPIDSIPHY0>;
1815 		clocks = <&pmucru CLK_MIPIDSIPHY1_REF>, <&cru PCLK_MIPIDSIPHY1>;
1826 		clocks = <&pmucru CLK_USBPHY0_REF>;
1848 		clocks = <&pmucru CLK_USBPHY1_REF>;
1879 			clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;