dts/renesas/rzg2l-smarc.dtsi

1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
17 	osc1: cec-clock {
18 		compatible = "fixed-clock";
19 		#clock-cells = <0>;
20 		clock-frequency = <12000000>;
23 	hdmi-out {
24 		compatible = "hdmi-connector";
29 				remote-endpoint = <&adv7535_out>;
35 		compatible = "audio-graph-card";
36 		label = "HDMI-Audio";
42 	sound-dai = <&ssi0>;
51 				data-lanes = <1 2 3 4>;
52 				remote-endpoint = <&adv7535_in>;
67 		interrupt-parent = <&pinctrl>;
70 		clock-names = "cec";
71 		avdd-supply = <&reg_1p8v>;
72 		dvdd-supply = <&reg_1p8v>;
73 		pvdd-supply = <&reg_1p8v>;
74 		a2vdd-supply = <&reg_1p8v>;
75 		v3p3-supply = <&reg_3p3v>;
76 		v1p2-supply = <&reg_1p8v>;
78 		adi,dsi-lanes = <4>;
81 			#address-cells = <1>;
82 			#size-cells = <0>;
87 					remote-endpoint = <&dsi0_out>;
94 					remote-endpoint = <&hdmi_con_out>;
101 					remote-endpoint = <&i2s2_cpu_endpoint>;
109 	pinctrl-0 = <&i2c3_pins>;
110 	pinctrl-names = "default";
111 	clock-frequency = <400000>;
117 		#sound-dai-cells = <0>;
121 	versa3: clock-generator@68 {
124 		#clock-cells = <1>;
133 		assigned-clocks = <&versa3 0>, <&versa3 1>,
136 		assigned-clock-rates = <24000000>, <11289600>,
144 	pinctrl-0 = <&mtu3_pins>;
145 	pinctrl-names = "default";
164  * SW1 should be at position 2->3 so that SER0_CTS# line is activated
165  * SW2 should be at position 2->3 so that SER0_TX line is activated
166  * SW3 should be at position 2->3 so that SER0_RX line is activated
167  * SW4 should be at position 2->3 so that SER0_RTS# line is activated
171 	pinctrl-0 = <&scif2_pins>;
172 	pinctrl-names = "default";
174 	uart-has-rtscts;
180 	pinctrl-0 = <&ssi0_pins>;
181 	pinctrl-names = "default";
187 	pinctrl-0 = <&ssi1_pins>;
188 	pinctrl-names = "default";
194 			remote-endpoint = <&codec_endpoint>;
195 			dai-format = "i2s";
197 			bitclock-master = <&i2s2_cpu_endpoint>;
198 			frame-master = <&i2s2_cpu_endpoint>;