Lines Matching refs:CPG_MOD
68 clocks = <&cpg CPG_MOD R9A08G045_SCIF0_CLK_PCK>;
88 clocks = <&cpg CPG_MOD R9A08G045_I2C0_PCLK>;
110 clocks = <&cpg CPG_MOD R9A08G045_I2C1_PCLK>;
132 clocks = <&cpg CPG_MOD R9A08G045_I2C2_PCLK>;
154 clocks = <&cpg CPG_MOD R9A08G045_I2C3_PCLK>;
194 clocks = <&cpg CPG_MOD R9A08G045_GPIO_HCLK>;
265 clocks = <&cpg CPG_MOD R9A08G045_IA55_CLK>,
266 <&cpg CPG_MOD R9A08G045_IA55_PCLK>;
299 clocks = <&cpg CPG_MOD R9A08G045_DMAC_ACLK>,
300 <&cpg CPG_MOD R9A08G045_DMAC_PCLK>;
315 clocks = <&cpg CPG_MOD R9A08G045_SDHI0_IMCLK>,
316 <&cpg CPG_MOD R9A08G045_SDHI0_CLK_HS>,
317 <&cpg CPG_MOD R9A08G045_SDHI0_IMCLK2>,
318 <&cpg CPG_MOD R9A08G045_SDHI0_ACLK>;
330 clocks = <&cpg CPG_MOD R9A08G045_SDHI1_IMCLK>,
331 <&cpg CPG_MOD R9A08G045_SDHI1_CLK_HS>,
332 <&cpg CPG_MOD R9A08G045_SDHI1_IMCLK2>,
333 <&cpg CPG_MOD R9A08G045_SDHI1_ACLK>;
345 clocks = <&cpg CPG_MOD R9A08G045_SDHI2_IMCLK>,
346 <&cpg CPG_MOD R9A08G045_SDHI2_CLK_HS>,
347 <&cpg CPG_MOD R9A08G045_SDHI2_IMCLK2>,
348 <&cpg CPG_MOD R9A08G045_SDHI2_ACLK>;
363 clocks = <&cpg CPG_MOD R9A08G045_ETH0_CLK_AXI>,
364 <&cpg CPG_MOD R9A08G045_ETH0_CLK_CHI>,
365 <&cpg CPG_MOD R9A08G045_ETH0_REFCLK>;
382 clocks = <&cpg CPG_MOD R9A08G045_ETH1_CLK_AXI>,
383 <&cpg CPG_MOD R9A08G045_ETH1_CLK_CHI>,
384 <&cpg CPG_MOD R9A08G045_ETH1_REFCLK>;
406 clocks = <&cpg CPG_MOD R9A08G045_WDT0_PCLK>,
407 <&cpg CPG_MOD R9A08G045_WDT0_CLK>;