Lines Matching +full:0 +full:x10090000
18 #size-cells = <0>;
20 cpu0: cpu@0 {
22 reg = <0>;
30 L3_CA55: cache-controller-0 {
34 cache-size = <0x40000>;
40 #clock-cells = <0>;
42 clock-frequency = <0>;
59 reg = <0 0x1004b800 0 0x400>;
77 reg = <0 0x10090000 0 0x400>;
93 #size-cells = <0>;
99 reg = <0 0x10090400 0 0x400>;
115 #size-cells = <0>;
121 reg = <0 0x10090800 0 0x400>;
137 #size-cells = <0>;
143 reg = <0 0x10090c00 0 0x400>;
159 #size-cells = <0>;
165 reg = <0 0x11010000 0 0x10000>;
170 #power-domain-cells = <0>;
175 reg = <0 0x11020000 0 0x10000>;
187 reg = <0 0x11030000 0 0x10000>;
193 gpio-ranges = <&pinctrl 0 0 152>;
204 #address-cells = <0>;
206 reg = <0 0x11050000 0 0x10000>;
207 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
263 "bus-err", "ec7tie1-0", "ec7tie2-0",
264 "ec7tiovf-0";
275 reg = <0 0x11820000 0 0x10000>,
276 <0 0x11830000 0 0x10000>;
312 reg = <0x0 0x11c00000 0 0x10000>;
327 reg = <0x0 0x11c10000 0 0x10000>;
342 reg = <0x0 0x11c20000 0 0x10000>;
357 reg = <0 0x11c30000 0 0x10000>;
370 #size-cells = <0>;
376 reg = <0 0x11c40000 0 0x10000>;
389 #size-cells = <0>;
396 #address-cells = <0>;
398 reg = <0x0 0x12400000 0 0x20000>,
399 <0x0 0x12440000 0 0x40000>;
405 reg = <0 0x12800800 0 0x400>;