Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
79 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
91 clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>;
161 clocks = <&cpg CPG_MOD 402>;
163 resets = <&cpg 402>;
177 clocks = <&cpg CPG_MOD 912>;
179 resets = <&cpg 912>;
192 clocks = <&cpg CPG_MOD 911>;
194 resets = <&cpg 911>;
207 clocks = <&cpg CPG_MOD 910>;
209 resets = <&cpg 910>;
222 clocks = <&cpg CPG_MOD 909>;
224 resets = <&cpg 909>;
237 clocks = <&cpg CPG_MOD 908>;
239 resets = <&cpg 908>;
252 clocks = <&cpg CPG_MOD 907>;
254 resets = <&cpg 907>;
267 clocks = <&cpg CPG_MOD 906>;
269 resets = <&cpg 906>;
285 clocks = <&cpg CPG_MOD 926>;
287 resets = <&cpg 926>;
299 clocks = <&cpg CPG_MOD 303>;
302 resets = <&cpg 303>;
318 clocks = <&cpg CPG_MOD 302>;
321 resets = <&cpg 302>;
337 clocks = <&cpg CPG_MOD 301>;
340 resets = <&cpg 301>;
356 clocks = <&cpg CPG_MOD 300>;
359 resets = <&cpg 300>;
363 cpg: clock-controller@e6150000 { label
364 compatible = "renesas,r8a77990-cpg-mssr";
390 clocks = <&cpg CPG_MOD 522>;
392 resets = <&cpg 522>;
407 clocks = <&cpg CPG_MOD 407>;
409 resets = <&cpg 407>;
419 clocks = <&cpg CPG_MOD 125>;
422 resets = <&cpg 125>;
434 clocks = <&cpg CPG_MOD 124>;
437 resets = <&cpg 124>;
449 clocks = <&cpg CPG_MOD 123>;
452 resets = <&cpg 123>;
463 clocks = <&cpg CPG_MOD 122>;
466 resets = <&cpg 122>;
477 clocks = <&cpg CPG_MOD 121>;
480 resets = <&cpg 121>;
491 clocks = <&cpg CPG_MOD 931>;
493 resets = <&cpg 931>;
508 clocks = <&cpg CPG_MOD 930>;
510 resets = <&cpg 930>;
525 clocks = <&cpg CPG_MOD 929>;
527 resets = <&cpg 929>;
542 clocks = <&cpg CPG_MOD 928>;
544 resets = <&cpg 928>;
558 clocks = <&cpg CPG_MOD 927>;
560 resets = <&cpg 927>;
574 clocks = <&cpg CPG_MOD 919>;
576 resets = <&cpg 919>;
590 clocks = <&cpg CPG_MOD 918>;
592 resets = <&cpg 918>;
606 clocks = <&cpg CPG_MOD 1003>;
608 resets = <&cpg 1003>;
619 clocks = <&cpg CPG_MOD 520>,
620 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
627 resets = <&cpg 520>;
637 clocks = <&cpg CPG_MOD 519>,
638 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
645 resets = <&cpg 519>;
655 clocks = <&cpg CPG_MOD 518>,
656 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
663 resets = <&cpg 518>;
673 clocks = <&cpg CPG_MOD 517>,
674 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
680 resets = <&cpg 517>;
690 clocks = <&cpg CPG_MOD 516>,
691 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
697 resets = <&cpg 516>;
706 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
714 resets = <&cpg 704>, <&cpg 703>;
725 clocks = <&cpg CPG_MOD 330>;
727 resets = <&cpg 330>;
739 clocks = <&cpg CPG_MOD 331>;
741 resets = <&cpg 331>;
750 clocks = <&cpg CPG_MOD 229>;
751 resets = <&cpg 229>;
781 clocks = <&cpg CPG_MOD 219>;
784 resets = <&cpg 219>;
823 clocks = <&cpg CPG_MOD 218>;
826 resets = <&cpg 218>;
865 clocks = <&cpg CPG_MOD 217>;
868 resets = <&cpg 217>;
998 clocks = <&cpg CPG_MOD 812>;
1001 resets = <&cpg 812>;
1015 clocks = <&cpg CPG_MOD 916>,
1016 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1019 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1022 resets = <&cpg 916>;
1031 clocks = <&cpg CPG_MOD 915>,
1032 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1035 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1038 resets = <&cpg 915>;
1049 clocks = <&cpg CPG_MOD 914>,
1050 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1053 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1056 resets = <&cpg 914>;
1071 clocks = <&cpg CPG_MOD 523>;
1073 resets = <&cpg 523>;
1081 clocks = <&cpg CPG_MOD 523>;
1083 resets = <&cpg 523>;
1091 clocks = <&cpg CPG_MOD 523>;
1093 resets = <&cpg 523>;
1101 clocks = <&cpg CPG_MOD 523>;
1103 resets = <&cpg 523>;
1111 clocks = <&cpg CPG_MOD 523>;
1113 resets = <&cpg 523>;
1121 clocks = <&cpg CPG_MOD 523>;
1123 resets = <&cpg 523>;
1131 clocks = <&cpg CPG_MOD 523>;
1133 resets = <&cpg 523>;
1143 clocks = <&cpg CPG_MOD 207>,
1144 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1151 resets = <&cpg 207>;
1160 clocks = <&cpg CPG_MOD 206>,
1161 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1168 resets = <&cpg 206>;
1177 clocks = <&cpg CPG_MOD 310>,
1178 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1185 resets = <&cpg 310>;
1194 clocks = <&cpg CPG_MOD 204>,
1195 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1201 resets = <&cpg 204>;
1210 clocks = <&cpg CPG_MOD 203>,
1211 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1217 resets = <&cpg 203>;
1226 clocks = <&cpg CPG_MOD 202>,
1227 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1233 resets = <&cpg 202>;
1242 clocks = <&cpg CPG_MOD 211>;
1247 resets = <&cpg 211>;
1258 clocks = <&cpg CPG_MOD 210>;
1262 resets = <&cpg 210>;
1273 clocks = <&cpg CPG_MOD 209>;
1277 resets = <&cpg 209>;
1288 clocks = <&cpg CPG_MOD 208>;
1292 resets = <&cpg 208>;
1302 clocks = <&cpg CPG_MOD 807>;
1304 resets = <&cpg 807>;
1330 clocks = <&cpg CPG_MOD 806>;
1332 resets = <&cpg 806>;
1359 clocks = <&cpg CPG_MOD 515>;
1364 resets = <&cpg 515>;
1374 clocks = <&cpg CPG_MOD 514>;
1379 resets = <&cpg 514>;
1389 clocks = <&cpg CPG_MOD 513>;
1394 resets = <&cpg 513>;
1404 clocks = <&cpg CPG_MOD 512>;
1409 resets = <&cpg 512>;
1419 clocks = <&cpg CPG_MOD 511>;
1424 resets = <&cpg 511>;
1434 clocks = <&cpg CPG_MOD 510>;
1439 resets = <&cpg 510>;
1449 clocks = <&cpg CPG_MOD 509>;
1454 resets = <&cpg 509>;
1464 clocks = <&cpg CPG_MOD 508>;
1469 resets = <&cpg 508>;
1495 clocks = <&cpg CPG_MOD 1005>,
1496 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1497 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1498 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1499 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1500 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1501 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1502 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1503 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1504 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1505 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1506 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1507 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1508 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1511 <&cpg CPG_MOD 922>;
1524 resets = <&cpg 1005>,
1525 <&cpg 1006>, <&cpg 1007>,
1526 <&cpg 1008>, <&cpg 1009>,
1527 <&cpg 1010>, <&cpg 1011>,
1528 <&cpg 1012>, <&cpg 1013>,
1529 <&cpg 1014>, <&cpg 1015>;
1686 clocks = <&cpg CPG_MOD 802>;
1688 resets = <&cpg 802>;
1718 clocks = <&cpg CPG_MOD 502>;
1721 resets = <&cpg 502>;
1739 clocks = <&cpg CPG_MOD 328>;
1741 resets = <&cpg 328>;
1750 clocks = <&cpg CPG_MOD 328>;
1752 resets = <&cpg 328>;
1760 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1764 resets = <&cpg 703>, <&cpg 704>;
1772 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1777 resets = <&cpg 703>, <&cpg 704>;
1786 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1788 resets = <&cpg 703>, <&cpg 704>;
1798 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1802 resets = <&cpg 314>;
1812 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1816 resets = <&cpg 313>;
1826 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1830 resets = <&cpg 311>;
1843 clocks = <&cpg CPG_MOD 917>;
1845 resets = <&cpg 917>;
1862 clocks = <&cpg CPG_MOD 408>;
1865 resets = <&cpg 408>;
1888 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1891 resets = <&cpg 319>;
1901 clocks = <&cpg CPG_MOD 626>;
1903 resets = <&cpg 626>;
1910 clocks = <&cpg CPG_MOD 607>;
1912 resets = <&cpg 607>;
1920 clocks = <&cpg CPG_MOD 631>;
1922 resets = <&cpg 631>;
1929 clocks = <&cpg CPG_MOD 611>;
1931 resets = <&cpg 611>;
1939 clocks = <&cpg CPG_MOD 623>;
1941 resets = <&cpg 623>;
1948 clocks = <&cpg CPG_MOD 603>;
1950 resets = <&cpg 603>;
1958 clocks = <&cpg CPG_MOD 622>;
1960 resets = <&cpg 622>;
1967 clocks = <&cpg CPG_MOD 602>;
1969 resets = <&cpg 602>;
1978 clocks = <&cpg CPG_MOD 711>;
1979 resets = <&cpg 711>;
1987 clocks = <&cpg CPG_MOD 710>;
1988 resets = <&cpg 710>;
1995 clocks = <&cpg CPG_MOD 716>;
1997 resets = <&cpg 716>;
2031 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2033 resets = <&cpg 724>;
2068 clocks = <&cpg CPG_MOD 727>;
2070 resets = <&cpg 727>;
2095 clocks = <&cpg CPG_MOD 727>;
2097 resets = <&cpg 726>;