Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
151 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
181 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
194 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
207 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
220 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
323 clocks = <&cpg CPG_MOD 402>;
325 resets = <&cpg 402>;
339 clocks = <&cpg CPG_MOD 912>;
341 resets = <&cpg 912>;
354 clocks = <&cpg CPG_MOD 911>;
356 resets = <&cpg 911>;
369 clocks = <&cpg CPG_MOD 910>;
371 resets = <&cpg 910>;
384 clocks = <&cpg CPG_MOD 909>;
386 resets = <&cpg 909>;
399 clocks = <&cpg CPG_MOD 908>;
401 resets = <&cpg 908>;
414 clocks = <&cpg CPG_MOD 907>;
416 resets = <&cpg 907>;
429 clocks = <&cpg CPG_MOD 906>;
431 resets = <&cpg 906>;
444 clocks = <&cpg CPG_MOD 905>;
446 resets = <&cpg 905>;
460 clocks = <&cpg CPG_MOD 303>;
463 resets = <&cpg 303>;
479 clocks = <&cpg CPG_MOD 302>;
482 resets = <&cpg 302>;
498 clocks = <&cpg CPG_MOD 301>;
501 resets = <&cpg 301>;
517 clocks = <&cpg CPG_MOD 300>;
520 resets = <&cpg 300>;
524 cpg: clock-controller@e6150000 { label
525 compatible = "renesas,r8a7796-cpg-mssr";
553 clocks = <&cpg CPG_MOD 522>;
555 resets = <&cpg 522>;
570 clocks = <&cpg CPG_MOD 407>;
572 resets = <&cpg 407>;
582 clocks = <&cpg CPG_MOD 125>;
585 resets = <&cpg 125>;
597 clocks = <&cpg CPG_MOD 124>;
600 resets = <&cpg 124>;
612 clocks = <&cpg CPG_MOD 123>;
615 resets = <&cpg 123>;
626 clocks = <&cpg CPG_MOD 122>;
629 resets = <&cpg 122>;
640 clocks = <&cpg CPG_MOD 121>;
643 resets = <&cpg 121>;
654 clocks = <&cpg CPG_MOD 931>;
656 resets = <&cpg 931>;
671 clocks = <&cpg CPG_MOD 930>;
673 resets = <&cpg 930>;
688 clocks = <&cpg CPG_MOD 929>;
690 resets = <&cpg 929>;
705 clocks = <&cpg CPG_MOD 928>;
707 resets = <&cpg 928>;
721 clocks = <&cpg CPG_MOD 927>;
723 resets = <&cpg 927>;
737 clocks = <&cpg CPG_MOD 919>;
739 resets = <&cpg 919>;
753 clocks = <&cpg CPG_MOD 918>;
755 resets = <&cpg 918>;
770 clocks = <&cpg CPG_MOD 926>;
772 resets = <&cpg 926>;
784 clocks = <&cpg CPG_MOD 520>,
785 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
792 resets = <&cpg 520>;
802 clocks = <&cpg CPG_MOD 519>,
803 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
810 resets = <&cpg 519>;
820 clocks = <&cpg CPG_MOD 518>,
821 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
828 resets = <&cpg 518>;
838 clocks = <&cpg CPG_MOD 517>,
839 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
845 resets = <&cpg 517>;
855 clocks = <&cpg CPG_MOD 516>,
856 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
862 resets = <&cpg 516>;
871 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
879 resets = <&cpg 704>, <&cpg 703>;
890 clocks = <&cpg CPG_MOD 330>;
892 resets = <&cpg 330>;
904 clocks = <&cpg CPG_MOD 331>;
906 resets = <&cpg 331>;
915 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
919 resets = <&cpg 328>;
928 clocks = <&cpg CPG_MOD 229>;
929 resets = <&cpg 229>;
959 clocks = <&cpg CPG_MOD 219>;
962 resets = <&cpg 219>;
1001 clocks = <&cpg CPG_MOD 218>;
1004 resets = <&cpg 218>;
1043 clocks = <&cpg CPG_MOD 217>;
1046 resets = <&cpg 217>;
1184 clocks = <&cpg CPG_MOD 812>;
1187 resets = <&cpg 812>;
1202 clocks = <&cpg CPG_MOD 916>,
1203 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1206 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1209 resets = <&cpg 916>;
1218 clocks = <&cpg CPG_MOD 915>,
1219 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1222 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1225 resets = <&cpg 915>;
1236 clocks = <&cpg CPG_MOD 914>,
1237 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1240 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1243 resets = <&cpg 914>;
1259 clocks = <&cpg CPG_MOD 523>;
1260 resets = <&cpg 523>;
1269 clocks = <&cpg CPG_MOD 523>;
1270 resets = <&cpg 523>;
1279 clocks = <&cpg CPG_MOD 523>;
1280 resets = <&cpg 523>;
1289 clocks = <&cpg CPG_MOD 523>;
1290 resets = <&cpg 523>;
1299 clocks = <&cpg CPG_MOD 523>;
1300 resets = <&cpg 523>;
1309 clocks = <&cpg CPG_MOD 523>;
1310 resets = <&cpg 523>;
1319 clocks = <&cpg CPG_MOD 523>;
1320 resets = <&cpg 523>;
1330 clocks = <&cpg CPG_MOD 207>,
1331 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1338 resets = <&cpg 207>;
1347 clocks = <&cpg CPG_MOD 206>,
1348 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1355 resets = <&cpg 206>;
1364 clocks = <&cpg CPG_MOD 310>,
1365 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1372 resets = <&cpg 310>;
1381 clocks = <&cpg CPG_MOD 204>,
1382 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1388 resets = <&cpg 204>;
1397 clocks = <&cpg CPG_MOD 203>,
1398 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1404 resets = <&cpg 203>;
1413 clocks = <&cpg CPG_MOD 202>,
1414 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1421 resets = <&cpg 202>;
1429 clocks = <&cpg CPG_MOD 304>;
1431 resets = <&cpg 304>;
1441 clocks = <&cpg CPG_MOD 211>;
1446 resets = <&cpg 211>;
1457 clocks = <&cpg CPG_MOD 210>;
1462 resets = <&cpg 210>;
1473 clocks = <&cpg CPG_MOD 209>;
1477 resets = <&cpg 209>;
1488 clocks = <&cpg CPG_MOD 208>;
1492 resets = <&cpg 208>;
1502 clocks = <&cpg CPG_MOD 811>;
1504 resets = <&cpg 811>;
1534 clocks = <&cpg CPG_MOD 810>;
1536 resets = <&cpg 810>;
1566 clocks = <&cpg CPG_MOD 809>;
1568 resets = <&cpg 809>;
1598 clocks = <&cpg CPG_MOD 808>;
1600 resets = <&cpg 808>;
1630 clocks = <&cpg CPG_MOD 807>;
1632 resets = <&cpg 807>;
1662 clocks = <&cpg CPG_MOD 806>;
1664 resets = <&cpg 806>;
1694 clocks = <&cpg CPG_MOD 805>;
1696 resets = <&cpg 805>;
1726 clocks = <&cpg CPG_MOD 804>;
1728 resets = <&cpg 804>;
1759 clocks = <&cpg CPG_MOD 515>;
1764 resets = <&cpg 515>;
1774 clocks = <&cpg CPG_MOD 514>;
1779 resets = <&cpg 514>;
1789 clocks = <&cpg CPG_MOD 513>;
1794 resets = <&cpg 513>;
1804 clocks = <&cpg CPG_MOD 512>;
1809 resets = <&cpg 512>;
1819 clocks = <&cpg CPG_MOD 511>;
1824 resets = <&cpg 511>;
1834 clocks = <&cpg CPG_MOD 510>;
1839 resets = <&cpg 510>;
1849 clocks = <&cpg CPG_MOD 509>;
1854 resets = <&cpg 509>;
1864 clocks = <&cpg CPG_MOD 508>;
1869 resets = <&cpg 508>;
1895 clocks = <&cpg CPG_MOD 1005>,
1896 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1897 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1898 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1899 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1900 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1901 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1902 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1903 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1904 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1905 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1906 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1907 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1908 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1911 <&cpg CPG_MOD 922>;
1924 resets = <&cpg 1005>,
1925 <&cpg 1006>, <&cpg 1007>,
1926 <&cpg 1008>, <&cpg 1009>,
1927 <&cpg 1010>, <&cpg 1011>,
1928 <&cpg 1012>, <&cpg 1013>,
1929 <&cpg 1014>, <&cpg 1015>;
2287 clocks = <&cpg CPG_MOD 802>;
2289 resets = <&cpg 802>;
2319 clocks = <&cpg CPG_MOD 502>;
2322 resets = <&cpg 502>;
2361 clocks = <&cpg CPG_MOD 501>;
2364 resets = <&cpg 501>;
2382 clocks = <&cpg CPG_MOD 328>;
2384 resets = <&cpg 328>;
2393 clocks = <&cpg CPG_MOD 328>;
2395 resets = <&cpg 328>;
2403 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2407 resets = <&cpg 703>, <&cpg 704>;
2415 clocks = <&cpg CPG_MOD 702>;
2419 resets = <&cpg 702>;
2427 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2432 resets = <&cpg 703>, <&cpg 704>;
2440 clocks = <&cpg CPG_MOD 702>;
2445 resets = <&cpg 702>;
2454 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2456 resets = <&cpg 703>, <&cpg 704>;
2465 clocks = <&cpg CPG_MOD 702>;
2467 resets = <&cpg 702>;
2477 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
2481 resets = <&cpg 314>;
2491 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
2495 resets = <&cpg 313>;
2505 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
2509 resets = <&cpg 312>;
2519 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
2523 resets = <&cpg 311>;
2536 clocks = <&cpg CPG_MOD 917>;
2538 resets = <&cpg 917>;
2555 clocks = <&cpg CPG_MOD 408>;
2558 resets = <&cpg 408>;
2581 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2584 resets = <&cpg 319>;
2610 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2613 resets = <&cpg 318>;
2624 clocks = <&cpg CPG_MOD 823>;
2626 resets = <&cpg 823>;
2634 clocks = <&cpg CPG_MOD 822>;
2636 resets = <&cpg 822>;
2643 clocks = <&cpg CPG_MOD 119>;
2645 resets = <&cpg 119>;
2652 clocks = <&cpg CPG_MOD 615>;
2654 resets = <&cpg 615>;
2661 clocks = <&cpg CPG_MOD 607>;
2663 resets = <&cpg 607>;
2670 clocks = <&cpg CPG_MOD 611>;
2672 resets = <&cpg 611>;
2679 clocks = <&cpg CPG_MOD 603>;
2681 resets = <&cpg 603>;
2688 clocks = <&cpg CPG_MOD 602>;
2690 resets = <&cpg 602>;
2697 clocks = <&cpg CPG_MOD 601>;
2699 resets = <&cpg 601>;
2707 clocks = <&cpg CPG_MOD 626>;
2709 resets = <&cpg 626>;
2718 clocks = <&cpg CPG_MOD 623>;
2720 resets = <&cpg 623>;
2729 clocks = <&cpg CPG_MOD 622>;
2731 resets = <&cpg 622>;
2740 clocks = <&cpg CPG_MOD 621>;
2742 resets = <&cpg 621>;
2751 clocks = <&cpg CPG_MOD 631>;
2753 resets = <&cpg 631>;
2763 clocks = <&cpg CPG_MOD 711>;
2764 resets = <&cpg 711>;
2772 clocks = <&cpg CPG_MOD 710>;
2773 resets = <&cpg 710>;
2781 clocks = <&cpg CPG_MOD 709>;
2782 resets = <&cpg 709>;
2789 clocks = <&cpg CPG_MOD 714>;
2791 resets = <&cpg 714>;
2848 clocks = <&cpg CPG_MOD 716>;
2850 resets = <&cpg 716>;
2908 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2911 resets = <&cpg 729>;
2939 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2940 <&cpg CPG_MOD 722>;
2942 resets = <&cpg 724>, <&cpg 722>;
2975 clocks = <&cpg CPG_MOD 727>;
2977 resets = <&cpg 727>;