Lines Matching full:cpg
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
78 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
89 clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
146 clocks = <&cpg CPG_MOD 402>;
148 resets = <&cpg 402>;
162 clocks = <&cpg CPG_MOD 912>;
164 resets = <&cpg 912>;
177 clocks = <&cpg CPG_MOD 911>;
179 resets = <&cpg 911>;
192 clocks = <&cpg CPG_MOD 910>;
194 resets = <&cpg 910>;
207 clocks = <&cpg CPG_MOD 909>;
209 resets = <&cpg 909>;
222 clocks = <&cpg CPG_MOD 908>;
224 resets = <&cpg 908>;
237 clocks = <&cpg CPG_MOD 907>;
239 resets = <&cpg 907>;
252 clocks = <&cpg CPG_MOD 906>;
254 resets = <&cpg 906>;
268 clocks = <&cpg CPG_MOD 303>;
271 resets = <&cpg 303>;
287 clocks = <&cpg CPG_MOD 302>;
290 resets = <&cpg 302>;
306 clocks = <&cpg CPG_MOD 301>;
309 resets = <&cpg 301>;
325 clocks = <&cpg CPG_MOD 300>;
328 resets = <&cpg 300>;
332 cpg: clock-controller@e6150000 { label
333 compatible = "renesas,r8a774c0-cpg-mssr";
359 clocks = <&cpg CPG_MOD 522>;
361 resets = <&cpg 522>;
376 clocks = <&cpg CPG_MOD 407>;
378 resets = <&cpg 407>;
388 clocks = <&cpg CPG_MOD 125>;
391 resets = <&cpg 125>;
403 clocks = <&cpg CPG_MOD 124>;
406 resets = <&cpg 124>;
418 clocks = <&cpg CPG_MOD 123>;
421 resets = <&cpg 123>;
432 clocks = <&cpg CPG_MOD 122>;
435 resets = <&cpg 122>;
446 clocks = <&cpg CPG_MOD 121>;
449 resets = <&cpg 121>;
460 clocks = <&cpg CPG_MOD 931>;
462 resets = <&cpg 931>;
477 clocks = <&cpg CPG_MOD 930>;
479 resets = <&cpg 930>;
494 clocks = <&cpg CPG_MOD 929>;
496 resets = <&cpg 929>;
511 clocks = <&cpg CPG_MOD 928>;
513 resets = <&cpg 928>;
527 clocks = <&cpg CPG_MOD 927>;
529 resets = <&cpg 927>;
543 clocks = <&cpg CPG_MOD 919>;
545 resets = <&cpg 919>;
559 clocks = <&cpg CPG_MOD 918>;
561 resets = <&cpg 918>;
575 clocks = <&cpg CPG_MOD 1003>;
577 resets = <&cpg 1003>;
590 clocks = <&cpg CPG_MOD 926>;
592 resets = <&cpg 926>;
604 clocks = <&cpg CPG_MOD 520>,
605 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
612 resets = <&cpg 520>;
622 clocks = <&cpg CPG_MOD 519>,
623 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
630 resets = <&cpg 519>;
640 clocks = <&cpg CPG_MOD 518>,
641 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
648 resets = <&cpg 518>;
658 clocks = <&cpg CPG_MOD 517>,
659 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
665 resets = <&cpg 517>;
675 clocks = <&cpg CPG_MOD 516>,
676 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
682 resets = <&cpg 516>;
691 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
699 resets = <&cpg 704>, <&cpg 703>;
710 clocks = <&cpg CPG_MOD 330>;
712 resets = <&cpg 330>;
724 clocks = <&cpg CPG_MOD 331>;
726 resets = <&cpg 331>;
757 clocks = <&cpg CPG_MOD 219>;
760 resets = <&cpg 219>;
799 clocks = <&cpg CPG_MOD 218>;
802 resets = <&cpg 218>;
841 clocks = <&cpg CPG_MOD 217>;
844 resets = <&cpg 217>;
966 clocks = <&cpg CPG_MOD 812>;
969 resets = <&cpg 812>;
983 clocks = <&cpg CPG_MOD 916>,
984 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
987 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
990 resets = <&cpg 916>;
999 clocks = <&cpg CPG_MOD 915>,
1000 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1003 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1006 resets = <&cpg 915>;
1017 clocks = <&cpg CPG_MOD 914>,
1018 <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1021 assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1024 resets = <&cpg 914>;
1039 clocks = <&cpg CPG_MOD 523>;
1041 resets = <&cpg 523>;
1049 clocks = <&cpg CPG_MOD 523>;
1051 resets = <&cpg 523>;
1059 clocks = <&cpg CPG_MOD 523>;
1061 resets = <&cpg 523>;
1069 clocks = <&cpg CPG_MOD 523>;
1071 resets = <&cpg 523>;
1079 clocks = <&cpg CPG_MOD 523>;
1081 resets = <&cpg 523>;
1089 clocks = <&cpg CPG_MOD 523>;
1091 resets = <&cpg 523>;
1099 clocks = <&cpg CPG_MOD 523>;
1101 resets = <&cpg 523>;
1111 clocks = <&cpg CPG_MOD 207>,
1112 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1119 resets = <&cpg 207>;
1128 clocks = <&cpg CPG_MOD 206>,
1129 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1136 resets = <&cpg 206>;
1145 clocks = <&cpg CPG_MOD 310>,
1146 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1153 resets = <&cpg 310>;
1162 clocks = <&cpg CPG_MOD 204>,
1163 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1169 resets = <&cpg 204>;
1178 clocks = <&cpg CPG_MOD 203>,
1179 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1185 resets = <&cpg 203>;
1194 clocks = <&cpg CPG_MOD 202>,
1195 <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1201 resets = <&cpg 202>;
1210 clocks = <&cpg CPG_MOD 211>;
1215 resets = <&cpg 211>;
1226 clocks = <&cpg CPG_MOD 210>;
1230 resets = <&cpg 210>;
1241 clocks = <&cpg CPG_MOD 209>;
1245 resets = <&cpg 209>;
1256 clocks = <&cpg CPG_MOD 208>;
1260 resets = <&cpg 208>;
1270 clocks = <&cpg CPG_MOD 807>;
1272 resets = <&cpg 807>;
1298 clocks = <&cpg CPG_MOD 806>;
1300 resets = <&cpg 806>;
1344 clocks = <&cpg CPG_MOD 1005>,
1345 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1346 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1347 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1348 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1349 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1350 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1351 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1352 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1353 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1354 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1355 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1356 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1357 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1360 <&cpg CPG_MOD 922>;
1373 resets = <&cpg 1005>,
1374 <&cpg 1006>, <&cpg 1007>,
1375 <&cpg 1008>, <&cpg 1009>,
1376 <&cpg 1010>, <&cpg 1011>,
1377 <&cpg 1012>, <&cpg 1013>,
1378 <&cpg 1014>, <&cpg 1015>;
1555 clocks = <&cpg CPG_MOD 502>;
1558 resets = <&cpg 502>;
1576 clocks = <&cpg CPG_MOD 328>;
1578 resets = <&cpg 328>;
1587 clocks = <&cpg CPG_MOD 328>;
1589 resets = <&cpg 328>;
1597 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1601 resets = <&cpg 703>, <&cpg 704>;
1609 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1614 resets = <&cpg 703>, <&cpg 704>;
1623 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1625 resets = <&cpg 703>, <&cpg 704>;
1635 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1639 resets = <&cpg 314>;
1649 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1653 resets = <&cpg 313>;
1663 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1667 resets = <&cpg 311>;
1680 clocks = <&cpg CPG_MOD 917>;
1682 resets = <&cpg 917>;
1699 clocks = <&cpg CPG_MOD 408>;
1702 resets = <&cpg 408>;
1725 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1728 resets = <&cpg 319>;
1746 clocks = <&cpg CPG_MOD 319>;
1748 resets = <&cpg 319>;
1757 clocks = <&cpg CPG_MOD 626>;
1759 resets = <&cpg 626>;
1767 clocks = <&cpg CPG_MOD 623>;
1769 resets = <&cpg 623>;
1777 clocks = <&cpg CPG_MOD 622>;
1779 resets = <&cpg 622>;
1787 clocks = <&cpg CPG_MOD 631>;
1789 resets = <&cpg 631>;
1796 clocks = <&cpg CPG_MOD 607>;
1798 resets = <&cpg 607>;
1805 clocks = <&cpg CPG_MOD 603>;
1807 resets = <&cpg 603>;
1814 clocks = <&cpg CPG_MOD 602>;
1816 resets = <&cpg 602>;
1823 clocks = <&cpg CPG_MOD 611>;
1825 resets = <&cpg 611>;
1833 clocks = <&cpg CPG_MOD 716>;
1835 resets = <&cpg 716>;
1869 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1871 resets = <&cpg 724>;
1904 clocks = <&cpg CPG_MOD 727>;
1906 resets = <&cpg 727>;
1931 clocks = <&cpg CPG_MOD 727>;
1933 resets = <&cpg 726>;