Lines Matching full:cpg

10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
129 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
142 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
157 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
169 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
181 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
193 clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
274 clocks = <&cpg CPG_MOD 402>;
276 resets = <&cpg 402>;
290 clocks = <&cpg CPG_MOD 912>;
292 resets = <&cpg 912>;
305 clocks = <&cpg CPG_MOD 911>;
307 resets = <&cpg 911>;
320 clocks = <&cpg CPG_MOD 910>;
322 resets = <&cpg 910>;
335 clocks = <&cpg CPG_MOD 909>;
337 resets = <&cpg 909>;
350 clocks = <&cpg CPG_MOD 908>;
352 resets = <&cpg 908>;
365 clocks = <&cpg CPG_MOD 907>;
367 resets = <&cpg 907>;
380 clocks = <&cpg CPG_MOD 906>;
382 resets = <&cpg 906>;
395 clocks = <&cpg CPG_MOD 905>;
397 resets = <&cpg 905>;
411 clocks = <&cpg CPG_MOD 303>;
414 resets = <&cpg 303>;
430 clocks = <&cpg CPG_MOD 302>;
433 resets = <&cpg 302>;
449 clocks = <&cpg CPG_MOD 301>;
452 resets = <&cpg 301>;
468 clocks = <&cpg CPG_MOD 300>;
471 resets = <&cpg 300>;
475 cpg: clock-controller@e6150000 { label
476 compatible = "renesas,r8a774a1-cpg-mssr";
504 clocks = <&cpg CPG_MOD 522>;
506 resets = <&cpg 522>;
521 clocks = <&cpg CPG_MOD 407>;
523 resets = <&cpg 407>;
533 clocks = <&cpg CPG_MOD 125>;
536 resets = <&cpg 125>;
548 clocks = <&cpg CPG_MOD 124>;
551 resets = <&cpg 124>;
563 clocks = <&cpg CPG_MOD 123>;
566 resets = <&cpg 123>;
577 clocks = <&cpg CPG_MOD 122>;
580 resets = <&cpg 122>;
591 clocks = <&cpg CPG_MOD 121>;
594 resets = <&cpg 121>;
605 clocks = <&cpg CPG_MOD 931>;
607 resets = <&cpg 931>;
622 clocks = <&cpg CPG_MOD 930>;
624 resets = <&cpg 930>;
639 clocks = <&cpg CPG_MOD 929>;
641 resets = <&cpg 929>;
656 clocks = <&cpg CPG_MOD 928>;
658 resets = <&cpg 928>;
672 clocks = <&cpg CPG_MOD 927>;
674 resets = <&cpg 927>;
688 clocks = <&cpg CPG_MOD 919>;
690 resets = <&cpg 919>;
704 clocks = <&cpg CPG_MOD 918>;
706 resets = <&cpg 918>;
721 clocks = <&cpg CPG_MOD 926>;
723 resets = <&cpg 926>;
735 clocks = <&cpg CPG_MOD 520>,
736 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
743 resets = <&cpg 520>;
753 clocks = <&cpg CPG_MOD 519>,
754 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
761 resets = <&cpg 519>;
771 clocks = <&cpg CPG_MOD 518>,
772 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
779 resets = <&cpg 518>;
789 clocks = <&cpg CPG_MOD 517>,
790 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
796 resets = <&cpg 517>;
806 clocks = <&cpg CPG_MOD 516>,
807 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
813 resets = <&cpg 516>;
822 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
830 resets = <&cpg 704>, <&cpg 703>;
838 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
844 resets = <&cpg 703>, <&cpg 704>;
856 clocks = <&cpg CPG_MOD 330>;
858 resets = <&cpg 330>;
870 clocks = <&cpg CPG_MOD 331>;
872 resets = <&cpg 331>;
881 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
885 resets = <&cpg 328>;
916 clocks = <&cpg CPG_MOD 219>;
919 resets = <&cpg 219>;
958 clocks = <&cpg CPG_MOD 218>;
961 resets = <&cpg 218>;
1000 clocks = <&cpg CPG_MOD 217>;
1003 resets = <&cpg 217>;
1125 clocks = <&cpg CPG_MOD 812>;
1128 resets = <&cpg 812>;
1143 clocks = <&cpg CPG_MOD 916>,
1144 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1147 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1150 resets = <&cpg 916>;
1159 clocks = <&cpg CPG_MOD 915>,
1160 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1163 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1166 resets = <&cpg 915>;
1177 clocks = <&cpg CPG_MOD 914>,
1178 <&cpg CPG_CORE R8A774A1_CLK_CANFD>,
1181 assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>;
1184 resets = <&cpg 914>;
1200 clocks = <&cpg CPG_MOD 523>;
1201 resets = <&cpg 523>;
1210 clocks = <&cpg CPG_MOD 523>;
1211 resets = <&cpg 523>;
1220 clocks = <&cpg CPG_MOD 523>;
1221 resets = <&cpg 523>;
1230 clocks = <&cpg CPG_MOD 523>;
1231 resets = <&cpg 523>;
1240 clocks = <&cpg CPG_MOD 523>;
1241 resets = <&cpg 523>;
1250 clocks = <&cpg CPG_MOD 523>;
1251 resets = <&cpg 523>;
1260 clocks = <&cpg CPG_MOD 523>;
1261 resets = <&cpg 523>;
1271 clocks = <&cpg CPG_MOD 207>,
1272 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1279 resets = <&cpg 207>;
1288 clocks = <&cpg CPG_MOD 206>,
1289 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1296 resets = <&cpg 206>;
1305 clocks = <&cpg CPG_MOD 310>,
1306 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1313 resets = <&cpg 310>;
1322 clocks = <&cpg CPG_MOD 204>,
1323 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1329 resets = <&cpg 204>;
1338 clocks = <&cpg CPG_MOD 203>,
1339 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1345 resets = <&cpg 203>;
1354 clocks = <&cpg CPG_MOD 202>,
1355 <&cpg CPG_CORE R8A774A1_CLK_S3D1>,
1362 resets = <&cpg 202>;
1371 clocks = <&cpg CPG_MOD 211>;
1376 resets = <&cpg 211>;
1387 clocks = <&cpg CPG_MOD 210>;
1392 resets = <&cpg 210>;
1403 clocks = <&cpg CPG_MOD 209>;
1407 resets = <&cpg 209>;
1418 clocks = <&cpg CPG_MOD 208>;
1422 resets = <&cpg 208>;
1432 clocks = <&cpg CPG_MOD 811>;
1434 resets = <&cpg 811>;
1464 clocks = <&cpg CPG_MOD 810>;
1466 resets = <&cpg 810>;
1496 clocks = <&cpg CPG_MOD 809>;
1498 resets = <&cpg 809>;
1528 clocks = <&cpg CPG_MOD 808>;
1530 resets = <&cpg 808>;
1560 clocks = <&cpg CPG_MOD 807>;
1562 resets = <&cpg 807>;
1592 clocks = <&cpg CPG_MOD 806>;
1594 resets = <&cpg 806>;
1624 clocks = <&cpg CPG_MOD 805>;
1626 resets = <&cpg 805>;
1656 clocks = <&cpg CPG_MOD 804>;
1658 resets = <&cpg 804>;
1705 clocks = <&cpg CPG_MOD 1005>,
1706 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1707 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1708 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1709 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1710 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1711 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1712 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1713 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1714 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1715 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1716 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1717 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1718 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1721 <&cpg CPG_MOD 922>;
1734 resets = <&cpg 1005>,
1735 <&cpg 1006>, <&cpg 1007>,
1736 <&cpg 1008>, <&cpg 1009>,
1737 <&cpg 1010>, <&cpg 1011>,
1738 <&cpg 1012>, <&cpg 1013>,
1739 <&cpg 1014>, <&cpg 1015>;
2117 clocks = <&cpg CPG_MOD 502>;
2120 resets = <&cpg 502>;
2159 clocks = <&cpg CPG_MOD 501>;
2162 resets = <&cpg 501>;
2180 clocks = <&cpg CPG_MOD 328>;
2182 resets = <&cpg 328>;
2191 clocks = <&cpg CPG_MOD 328>;
2193 resets = <&cpg 328>;
2201 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2205 resets = <&cpg 703>, <&cpg 704>;
2213 clocks = <&cpg CPG_MOD 702>;
2217 resets = <&cpg 702>;
2225 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2230 resets = <&cpg 703>, <&cpg 704>;
2238 clocks = <&cpg CPG_MOD 702>;
2243 resets = <&cpg 702>;
2252 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2254 resets = <&cpg 703>, <&cpg 704>;
2263 clocks = <&cpg CPG_MOD 702>;
2265 resets = <&cpg 702>;
2275 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774A1_CLK_SD0H>;
2279 resets = <&cpg 314>;
2289 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774A1_CLK_SD1H>;
2293 resets = <&cpg 313>;
2303 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774A1_CLK_SD2H>;
2307 resets = <&cpg 312>;
2317 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774A1_CLK_SD3H>;
2321 resets = <&cpg 311>;
2334 clocks = <&cpg CPG_MOD 917>;
2336 resets = <&cpg 917>;
2353 clocks = <&cpg CPG_MOD 408>;
2356 resets = <&cpg 408>;
2379 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2382 resets = <&cpg 319>;
2408 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2411 resets = <&cpg 318>;
2429 clocks = <&cpg CPG_MOD 319>;
2431 resets = <&cpg 319>;
2448 clocks = <&cpg CPG_MOD 318>;
2450 resets = <&cpg 318>;
2459 clocks = <&cpg CPG_MOD 119>;
2461 resets = <&cpg 119>;
2468 clocks = <&cpg CPG_MOD 615>;
2470 resets = <&cpg 615>;
2477 clocks = <&cpg CPG_MOD 607>;
2479 resets = <&cpg 607>;
2486 clocks = <&cpg CPG_MOD 603>;
2488 resets = <&cpg 603>;
2495 clocks = <&cpg CPG_MOD 602>;
2497 resets = <&cpg 602>;
2504 clocks = <&cpg CPG_MOD 601>;
2506 resets = <&cpg 601>;
2513 clocks = <&cpg CPG_MOD 611>;
2515 resets = <&cpg 611>;
2523 clocks = <&cpg CPG_MOD 626>;
2525 resets = <&cpg 626>;
2534 clocks = <&cpg CPG_MOD 623>;
2536 resets = <&cpg 623>;
2545 clocks = <&cpg CPG_MOD 622>;
2547 resets = <&cpg 622>;
2556 clocks = <&cpg CPG_MOD 621>;
2558 resets = <&cpg 621>;
2567 clocks = <&cpg CPG_MOD 631>;
2569 resets = <&cpg 631>;
2578 clocks = <&cpg CPG_MOD 714>;
2580 resets = <&cpg 714>;
2637 clocks = <&cpg CPG_MOD 716>;
2639 resets = <&cpg 716>;
2698 clocks = <&cpg CPG_MOD 729>,
2699 <&cpg CPG_CORE R8A774A1_CLK_HDMI>;
2702 resets = <&cpg 729>;
2730 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2731 <&cpg CPG_MOD 722>;
2733 resets = <&cpg 724>, <&cpg 722>;
2764 clocks = <&cpg CPG_MOD 727>;
2766 resets = <&cpg 727>;