dts/qcom/x1e80100.dtsi

50 			clock-mult = <1>;
59 			clock-mult = <1>;
297 			CLUSTER_CL5: cluster-sleep-1 {
322 	mc_virt: interconnect-1 {
697 			#qcom,smem-state-cells = <1>;
723 			#qcom,smem-state-cells = <1>;
757 			#clock-cells = <1>;
758 			#reset-cells = <1>;
759 			#power-domain-cells = <1>;
836 				       <&gpi_dma2 1 0 QCOM_GPI_I2C>;
843 				#address-cells = <1>;
869 				       <&gpi_dma2 1 0 QCOM_GPI_SPI>;
876 				#address-cells = <1>;
901 				dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
902 				       <&gpi_dma2 1 1 QCOM_GPI_I2C>;
909 				#address-cells = <1>;
934 				dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
935 				       <&gpi_dma2 1 1 QCOM_GPI_SPI>;
942 				#address-cells = <1>;
968 				       <&gpi_dma2 1 2 QCOM_GPI_I2C>;
975 				#address-cells = <1>;
1001 				       <&gpi_dma2 1 2 QCOM_GPI_SPI>;
1008 				#address-cells = <1>;
1034 				       <&gpi_dma2 1 3 QCOM_GPI_I2C>;
1041 				#address-cells = <1>;
1067 				       <&gpi_dma2 1 3 QCOM_GPI_SPI>;
1074 				#address-cells = <1>;
1100 				       <&gpi_dma2 1 4 QCOM_GPI_I2C>;
1107 				#address-cells = <1>;
1133 				       <&gpi_dma2 1 4 QCOM_GPI_SPI>;
1140 				#address-cells = <1>;
1166 				       <&gpi_dma2 1 5 QCOM_GPI_I2C>;
1173 				#address-cells = <1>;
1199 				       <&gpi_dma2 1 5 QCOM_GPI_SPI>;
1206 				#address-cells = <1>;
1254 				       <&gpi_dma2 1 6 QCOM_GPI_I2C>;
1261 				#address-cells = <1>;
1287 				       <&gpi_dma2 1 6 QCOM_GPI_SPI>;
1294 				#address-cells = <1>;
1320 				       <&gpi_dma2 1 7 QCOM_GPI_I2C>;
1327 				#address-cells = <1>;
1353 				       <&gpi_dma2 1 7 QCOM_GPI_SPI>;
1360 				#address-cells = <1>;
1430 				       <&gpi_dma1 1 0 QCOM_GPI_I2C>;
1437 				#address-cells = <1>;
1463 				       <&gpi_dma1 1 0 QCOM_GPI_SPI>;
1470 				#address-cells = <1>;
1495 				dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
1496 				       <&gpi_dma1 1 1 QCOM_GPI_I2C>;
1503 				#address-cells = <1>;
1528 				dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
1529 				       <&gpi_dma1 1 1 QCOM_GPI_SPI>;
1536 				#address-cells = <1>;
1562 				       <&gpi_dma1 1 2 QCOM_GPI_I2C>;
1569 				#address-cells = <1>;
1595 				       <&gpi_dma1 1 2 QCOM_GPI_SPI>;
1602 				#address-cells = <1>;
1628 				       <&gpi_dma1 1 3 QCOM_GPI_I2C>;
1635 				#address-cells = <1>;
1661 				       <&gpi_dma1 1 3 QCOM_GPI_SPI>;
1668 				#address-cells = <1>;
1694 				       <&gpi_dma1 1 4 QCOM_GPI_I2C>;
1701 				#address-cells = <1>;
1727 				       <&gpi_dma1 1 4 QCOM_GPI_SPI>;
1734 				#address-cells = <1>;
1760 				       <&gpi_dma1 1 5 QCOM_GPI_I2C>;
1767 				#address-cells = <1>;
1793 				       <&gpi_dma1 1 5 QCOM_GPI_SPI>;
1800 				#address-cells = <1>;
1826 				       <&gpi_dma1 1 6 QCOM_GPI_I2C>;
1833 				#address-cells = <1>;
1859 				       <&gpi_dma1 1 6 QCOM_GPI_SPI>;
1866 				#address-cells = <1>;
1892 				       <&gpi_dma1 1 7 QCOM_GPI_I2C>;
1899 				#address-cells = <1>;
1925 				       <&gpi_dma1 1 7 QCOM_GPI_SPI>;
1932 				#address-cells = <1>;
2001 				       <&gpi_dma0 1 0 QCOM_GPI_I2C>;
2008 				#address-cells = <1>;
2034 				       <&gpi_dma0 1 0 QCOM_GPI_SPI>;
2041 				#address-cells = <1>;
2066 				dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
2067 				       <&gpi_dma0 1 1 QCOM_GPI_I2C>;
2074 				#address-cells = <1>;
2099 				dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
2100 				       <&gpi_dma0 1 1 QCOM_GPI_SPI>;
2107 				#address-cells = <1>;
2133 				       <&gpi_dma0 1 2 QCOM_GPI_I2C>;
2140 				#address-cells = <1>;
2188 				       <&gpi_dma0 1 2 QCOM_GPI_SPI>;
2195 				#address-cells = <1>;
2221 				       <&gpi_dma0 1 3 QCOM_GPI_I2C>;
2228 				#address-cells = <1>;
2254 				       <&gpi_dma0 1 3 QCOM_GPI_SPI>;
2261 				#address-cells = <1>;
2287 				       <&gpi_dma0 1 4 QCOM_GPI_I2C>;
2294 				#address-cells = <1>;
2320 				       <&gpi_dma0 1 4 QCOM_GPI_SPI>;
2327 				#address-cells = <1>;
2353 				       <&gpi_dma0 1 5 QCOM_GPI_I2C>;
2360 				#address-cells = <1>;
2386 				       <&gpi_dma0 1 5 QCOM_GPI_SPI>;
2393 				#address-cells = <1>;
2419 				       <&gpi_dma0 1 6 QCOM_GPI_I2C>;
2426 				#address-cells = <1>;
2452 				       <&gpi_dma0 1 6 QCOM_GPI_SPI>;
2459 				#address-cells = <1>;
2485 				       <&gpi_dma0 1 7 QCOM_GPI_I2C>;
2492 				#address-cells = <1>;
2518 				       <&gpi_dma0 1 7 QCOM_GPI_SPI>;
2525 				#address-cells = <1>;
2544 			#thermal-sensor-cells = <1>;
2559 			#thermal-sensor-cells = <1>;
2574 			#thermal-sensor-cells = <1>;
2589 			#thermal-sensor-cells = <1>;
2626 			#clock-cells = <1>;
2627 			#phy-cells = <1>;
2634 				#address-cells = <1>;
2644 				port@1 {
2645 					reg = <1>;
2696 			#clock-cells = <1>;
2697 			#phy-cells = <1>;
2704 				#address-cells = <1>;
2714 				port@1 {
2715 					reg = <1>;
2766 			#clock-cells = <1>;
2767 			#phy-cells = <1>;
2774 				#address-cells = <1>;
2784 				port@1 {
2785 					reg = <1>;
2910 		pcie6a: pci@1bf8000 {
2953 			#interrupt-cells = <1>;
2955 			interrupt-map = <0 0 0 1 &intc 0 0 0 843 IRQ_TYPE_LEVEL_HIGH>,
2999 		pcie6a_phy: phy@1bfc000 {
3037 		pcie5: pci@1c00000 {
3080 			#interrupt-cells = <1>;
3082 			interrupt-map = <0 0 0 1 &intc 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>,
3126 		pcie5_phy: phy@1c06000 {
3159 		pcie4: pci@1c08000 {
3202 			#interrupt-cells = <1>;
3204 			interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>,
3258 		pcie4_phy: phy@1c0e000 {
3291 		tcsr_mutex: hwlock@1f40000 {
3294 			#hwlock-cells = <1>;
3297 		tcsr: clock-controller@1fc0000 {
3301 			#clock-cells = <1>;
3302 			#reset-cells = <1>;
3318 				 <&adreno_smmu 1 0x0>;
3394 			compatible = "qcom,adreno-gmu-x185.1", "qcom,adreno-gmu";
3451 			#clock-cells = <1>;
3452 			#reset-cells = <1>;
3453 			#power-domain-cells = <1>;
3461 			#global-interrupts = <1>;
3532 			#sound-dai-cells = <1>;
3564 			#sound-dai-cells = <1>;
3582 			#sound-dai-cells = <1>;
3598 			qcom,din-ports = <1>;
3613 			#sound-dai-cells = <1>;
3631 			#sound-dai-cells = <1>;
3648 			#sound-dai-cells = <1>;
3680 			#sound-dai-cells = <1>;
3687 			#clock-cells = <1>;
3688 			#reset-cells = <1>;
3707 			qcom,dout-ports = <1>;
3721 			#sound-dai-cells = <1>;
3737 			#sound-dai-cells = <1>;
3758 					slew-rate = <1>;
3766 					slew-rate = <1>;
3776 					slew-rate = <1>;
3784 					slew-rate = <1>;
3826 					slew-rate = <1>;
3834 					slew-rate = <1>;
3844 					slew-rate = <1>;
3852 					slew-rate = <1>;
3861 			#clock-cells = <1>;
3862 			#reset-cells = <1>;
4067 					#address-cells = <1>;
4077 					port@1 {
4078 						reg = <1>;
4151 					#address-cells = <1>;
4239 					    "usb2-1", "usb3-1";
4320 					#address-cells = <1>;
4330 					port@1 {
4331 						reg = <1>;
4418 					#address-cells = <1>;
4428 					port@1 {
4429 						reg = <1>;
4467 			#interrupt-cells = <1>;
4500 					#address-cells = <1>;
4604 					#address-cells = <1>;
4615 					port@1 {
4616 						reg = <1>;
4687 					#address-cells = <1>;
4698 					port@1 {
4699 						reg = <1>;
4770 					#address-cells = <1>;
4780 					port@1 {
4781 						reg = <1>;
4838 							 <&mdss_dp3_phy 1>;
4852 					#address-cells = <1>;
4863 					port@1 {
4864 						reg = <1>;
4909 			#clock-cells = <1>;
4929 			#clock-cells = <1>;
4953 				 <&mdss_dp3_phy 1>;
4956 			#clock-cells = <1>;
4957 			#reset-cells = <1>;
4958 			#power-domain-cells = <1>;
5009 				interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
5749 			#global-interrupts = <1>;
5762 			#redistributor-regions = <1>;
5774 				#msi-cells = <1>;
5785 			reg-names = "drv-0", "drv-1", "drv-2";
5808 				#clock-cells = <1>;
5816 				#power-domain-cells = <1>;
5889 			#size-cells = <1>;
5907 				frame-number = <1>;
5981 				opp-1 {
6038 				opp-1 {
6117 					      <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
6162 					#address-cells = <1>;
6211 					#address-cells = <1>;
6214 					q6apm: service@1 {
6223 							#sound-dai-cells = <1>;
6254 					      <&smp2p_cdsp_in 1 IRQ_TYPE_EDGE_RISING>,
6301 					#address-cells = <1>;
6304 					compute-cb@1 {
6306 						reg = <1>;
6425 			thermal-sensors = <&tsens0 1>;
6474 		cpu0-1-top-thermal {
6500 		cpu0-1-btm-thermal {
6719 			thermal-sensors = <&tsens1 1>;
6768 		cpu1-1-top-thermal {
6794 		cpu1-1-btm-thermal {
6981 			thermal-sensors = <&tsens2 1>;
7030 		cpu2-1-top-thermal {
7056 		cpu2-1-btm-thermal {
7241 			thermal-sensors = <&tsens3 1>;
7338 		gpuss-1-thermal {