dts/qcom/sm4450.dtsi

27 			#clock-cells = <0>;
33 			#clock-cells = <0>;
37 			#clock-cells = <0>;
47 		#size-cells = <0>;
49 		CPU0: cpu@0 {
52 			reg = <0x0 0x0>;
53 			clocks = <&cpufreq_hw 0>;
58 			qcom,freq-domain = <&cpufreq_hw 0>;
78 			reg = <0x0 0x100>;
79 			clocks = <&cpufreq_hw 0>;
84 			qcom,freq-domain = <&cpufreq_hw 0>;
98 			reg = <0x0 0x200>;
99 			clocks = <&cpufreq_hw 0>;
104 			qcom,freq-domain = <&cpufreq_hw 0>;
118 			reg = <0x0 0x300>;
119 			clocks = <&cpufreq_hw 0>;
124 			qcom,freq-domain = <&cpufreq_hw 0>;
138 			reg = <0x0 0x400>;
139 			clocks = <&cpufreq_hw 0>;
144 			qcom,freq-domain = <&cpufreq_hw 0>;
158 			reg = <0x0 0x500>;
159 			clocks = <&cpufreq_hw 0>;
164 			qcom,freq-domain = <&cpufreq_hw 0>;
178 			reg = <0x0 0x600>;
198 			reg = <0x0 0x700>;
254 			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
256 				arm,psci-suspend-param = <0x40000004>;
263 			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
265 				arm,psci-suspend-param = <0x40000004>;
274 			CLUSTER_SLEEP_0: cluster-sleep-0 {
276 				arm,psci-suspend-param = <0x41000044>;
284 				arm,psci-suspend-param = <0x41003344>;
295 		reg = <0x0 0xa0000000 0x0 0x0>;
313 			#power-domain-cells = <0>;
319 			#power-domain-cells = <0>;
325 			#power-domain-cells = <0>;
331 			#power-domain-cells = <0>;
337 			#power-domain-cells = <0>;
343 			#power-domain-cells = <0>;
349 			#power-domain-cells = <0>;
355 			#power-domain-cells = <0>;
361 			#power-domain-cells = <0>;
373 			reg = <0x0 0x80860000 0x0 0x20000>;
378 	soc: soc@0 {
381 		ranges = <0 0 0 0 0x10 0>;
382 		dma-ranges = <0 0 0 0 0x10 0>;
387 			reg = <0x0 0x00100000 0x0 0x1f4200>;
393 				 <0>,
394 				 <0>,
395 				 <0>,
396 				 <0>;
401 			reg = <0x0 0x00ac0000 0x0 0x2000>;
412 				reg = <0x0 0x00a88000 0x0 0x4000>;
416 				pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
424 			reg = <0x0 0x01f40000 0x0 0x40000>;
430 			reg = <0x0 0x03d90000 0x0 0xa000>;
441 			reg = <0x0 0x0ade0000 0x0 0x20000>;
451 			reg = <0x0 0x0af00000 0x0 0x20000>;
456 				 <0>,
457 				 <0>;
465 			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
466 			qcom,pdc-ranges = <0 480 94>, <94 494 31>,
475 			reg = <0x0 0x0f100000 0x0 0x300000>;
481 			gpio-ranges = <&tlmm 0 0 137>;
501 			reg = <0x0 0x17200000 0x0 0x10000>,     /* GICD */
502 			      <0x0 0x17260000 0x0 0x100000>;    /* GICR * 8 */
507 			redistributor-stride = <0x0 0x20000>;
512 			reg = <0x0 0x17420000 0x0 0x1000>;
513 			ranges = <0 0 0 0x20000000>;
518 				reg = <0x17421000 0x1000>,
519 				      <0x17422000 0x1000>;
520 				frame-number = <0>;
526 				reg = <0x17423000 0x1000>;
533 				reg = <0x17425000 0x1000>;
540 				reg = <0x17427000 0x1000>;
547 				reg = <0x17429000 0x1000>;
554 				reg = <0x1742b000 0x1000>;
561 				reg = <0x1742d000 0x1000>;
570 			reg = <0x0 0x17a00000 0x0 0x10000>,
571 			      <0x0 0x17a10000 0x0 0x10000>,
572 			      <0x0 0x17a20000 0x0 0x10000>;
573 			reg-names = "drv-0", "drv-1", "drv-2";
578 			qcom,tcs-offset = <0xd00>;
581 					  <WAKE_TCS      3>, <CONTROL_TCS   0>;
598 			reg = <0 0x17d91000 0 0x1000>,
599 			      <0 0x17d92000 0 0x1000>;
605 			interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1";