dts/qcom/sdx75.dtsi

167 			CPU_RAIL_OFF: cpu-rail-sleep-1 {
187 			CLUSTER_SLEEP_1: cluster-sleep-1 {
218 	mc_virt: interconnect-1 {
333 		aop_cmd_db_mem: aop-cmd-db@87ee0000 {
431 		qcom,remote-pid = <1>;
435 			#qcom,smem-state-cells = <1>;
446 			#qcom,smem-state-cells = <1>;
487 			#clock-cells = <1>;
488 			#reset-cells = <1>;
489 			#power-domain-cells = <1>;
545 				#address-cells = <1>;
557 				       <&gpi_dma 1 0 QCOM_GPI_I2C>;
568 				#address-cells = <1>;
580 				       <&gpi_dma 1 0 QCOM_GPI_SPI>;
598 				pinctrl-1 = <&qupv3_se1_2uart_sleep>;
610 				#address-cells = <1>;
622 				       <&gpi_dma 1 2 QCOM_GPI_I2C>;
633 				#address-cells = <1>;
645 				       <&gpi_dma 1 2 QCOM_GPI_SPI>;
656 				#address-cells = <1>;
668 				       <&gpi_dma 1 3 QCOM_GPI_I2C>;
679 				#address-cells = <1>;
691 				       <&gpi_dma 1 3 QCOM_GPI_SPI>;
718 				#address-cells = <1>;
730 				       <&gpi_dma 1 5 QCOM_GPI_I2C>;
741 				#address-cells = <1>;
753 				       <&gpi_dma 1 6 QCOM_GPI_I2C>;
764 				#address-cells = <1>;
776 				       <&gpi_dma 1 6 QCOM_GPI_SPI>;
787 				#address-cells = <1>;
799 				       <&gpi_dma 1 7 QCOM_GPI_I2C>;
810 				#address-cells = <1>;
822 				       <&gpi_dma 1 7 QCOM_GPI_SPI>;
883 		tcsr_mutex: hwlock@1f40000 {
886 			#hwlock-cells = <1>;
889 		tcsr: syscon@1fc0000 {
900 					      <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>,
937 				qcom,remote-pid = <1>;
1046 					#address-cells = <1>;
1056 					port@1 {
1057 						reg = <1>;
1101 			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
1371 			#redistributor-regions = <1>;
1381 			#address-cells = <1>;
1382 			#size-cells = <1>;
1395 				frame-number = <1>;
1442 			reg-names = "drv-0", "drv-1", "drv-2";
1463 				#clock-cells = <1>;
1468 				#power-domain-cells = <1>;
1527 			#freq-domain-cells = <1>;
1528 			#clock-cells = <1>;