Lines Matching +full:0 +full:xffc18000
33 regulators-0 {
266 pinctrl-0 = <ðernet0_default>;
278 #size-cells = <0>;
287 snps,map-to-dma-channel = <0x0>;
289 snps,priority = <0x1>;
294 snps,map-to-dma-channel = <0x1>;
300 snps,map-to-dma-channel = <0x2>;
306 snps,map-to-dma-channel = <0x3>;
307 snps,priority = <0xc>;
325 snps,send_slope = <0x1000>;
326 snps,idle_slope = <0x1000>;
327 snps,high_credit = <0x3e800>;
328 snps,low_credit = <0xffc18000>;
333 snps,send_slope = <0x1000>;
334 snps,idle_slope = <0x1000>;
335 snps,high_credit = <0x3e800>;
336 snps,low_credit = <0xffc18000>;
356 snps,map-to-dma-channel = <0x0>;
358 snps,priority = <0x1>;
363 snps,map-to-dma-channel = <0x1>;
369 snps,map-to-dma-channel = <0x2>;
375 snps,map-to-dma-channel = <0x3>;
376 snps,priority = <0xc>;
394 snps,send_slope = <0x1000>;
395 snps,idle_slope = <0x1000>;
396 snps,high_credit = <0x3e800>;
397 snps,low_credit = <0xffc18000>;
402 snps,send_slope = <0x1000>;
403 snps,idle_slope = <0x1000>;
404 snps,high_credit = <0x3e800>;
405 snps,low_credit = <0xffc18000>;
412 pinctrl-0 = <&qup_i2c11_default>;
419 pinctrl-0 = <&qup_i2c18_default>;
460 power-source = <0>;
482 power-source = <0>;
489 power-source = <0>;
524 pinctrl-0 = <&qup_spi16_default>;
673 wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
676 pinctrl-0 = <&pcie0_default_state>;
686 pinctrl-0 = <&pcie1_default_state>;
732 pinctrl-0 = <&qup_uart10_default>;
738 pinctrl-0 = <&qup_uart12_default>;
744 pinctrl-0 = <&qup_uart17_default>;
768 pinctrl-0 = <&usb0_en_state>;
794 pinctrl-0 = <&usb1_en_state>;
820 pinctrl-0 = <&usb2_en_state>;