Lines Matching +full:avdd28 +full:- +full:supply

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
16 #include <dt-bindings/spmi/spmi.h>
17 #include <dt-bindings/usb/pd.h>
20 model = "MediaTek Genio 1200 EVK-P1V2-EMMC";
21 compatible = "mediatek,mt8395-evk", "mediatek,mt8395",
30 stdout-path = "serial0:921600n8";
35 compatible = "linaro,optee-tz";
45 reserved-memory {
46 #address-cells = <2>;
47 #size-cells = <2>;
51 * 12 MiB reserved for OP-TEE (BL32)
52 * +-----------------------+ 0x43e0_0000
54 * +-----------------------+ 0x43c0_0000
56 * + TZDRAM +--------------+ 0x4340_0000
58 * +-----------------------+ 0x4320_0000
61 no-map;
66 compatible = "shared-dma-pool";
68 no-map;
72 compatible = "shared-dma-pool";
78 no-map;
83 compatible = "shared-dma-pool";
85 no-map;
89 compatible = "shared-dma-pool";
94 backlight_lcd0: backlight-lcd0 {
95 compatible = "pwm-backlight";
97 enable-gpios = <&pio 47 GPIO_ACTIVE_HIGH>;
98 brightness-levels = <0 1023>;
99 num-interpolated-steps = <1023>;
100 default-brightness-level = <576>;
103 backlight_lcd1: backlight-lcd1 {
104 compatible = "pwm-backlight";
106 enable-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
107 brightness-levels = <0 1023>;
108 num-interpolated-steps = <1023>;
109 default-brightness-level = <576>;
112 can_clk: can-clk {
113 compatible = "fixed-clock";
114 #clock-cells = <0>;
115 clock-frequency = <20000000>;
116 clock-output-names = "can-clk";
119 edp_panel_fixed_3v3: regulator-0 {
120 compatible = "regulator-fixed";
121 regulator-name = "edp_panel_3v3";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 enable-active-high;
126 pinctrl-names = "default";
127 pinctrl-0 = <&edp_panel_3v3_en_pins>;
130 edp_panel_fixed_12v: regulator-1 {
131 compatible = "regulator-fixed";
132 regulator-name = "edp_backlight_12v";
133 regulator-min-microvolt = <12000000>;
134 regulator-max-microvolt = <12000000>;
135 enable-active-high;
137 pinctrl-names = "default";
138 pinctrl-0 = <&edp_panel_12v_en_pins>;
141 keys: gpio-keys {
142 compatible = "gpio-keys";
144 button-volume-up {
145 wakeup-source;
146 debounce-interval = <100>;
153 wifi_fixed_3v3: regulator-2 {
154 compatible = "regulator-fixed";
155 regulator-name = "wifi_3v3";
156 regulator-min-microvolt = <3300000>;
157 regulator-max-microvolt = <3300000>;
159 enable-active-high;
160 regulator-always-on;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pwm0_default_pins>;
171 wakeup-delay-ms = <200>;
175 phy-mode ="rgmii-rxid";
176 phy-handle = <&eth_phy0>;
177 snps,reset-gpio = <&pio 93 GPIO_ACTIVE_HIGH>;
178 snps,reset-delays-us = <0 10000 10000>;
179 mediatek,tx-delay-ps = <2030>;
180 mediatek,mac-wol;
181 pinctrl-names = "default", "sleep";
182 pinctrl-0 = <&eth_default_pins>;
183 pinctrl-1 = <&eth_sleep_pins>;
187 compatible = "snps,dwmac-mdio";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 eth_phy0: eth-phy0@1 {
191 compatible = "ethernet-phy-id001c.c916";
198 clock-frequency = <400000>;
199 pinctrl-0 = <&i2c0_pins>;
200 pinctrl-names = "default";
205 clock-frequency = <400000>;
206 pinctrl-0 = <&i2c1_pins>;
207 pinctrl-names = "default";
213 interrupts-extended = <&pio 132 IRQ_TYPE_EDGE_RISING>;
214 irq-gpios = <&pio 132 GPIO_ACTIVE_HIGH>;
215 reset-gpios = <&pio 133 GPIO_ACTIVE_HIGH>;
216 AVDD28-supply = <&mt6360_ldo1>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&touch_pins>;
223 clock-frequency = <400000>;
224 pinctrl-0 = <&i2c2_pins>;
225 pinctrl-names = "default";
230 clock-frequency = <400000>;
231 pinctrl-0 = <&i2c6_pins>;
232 pinctrl-names = "default";
233 #address-cells = <1>;
234 #size-cells = <0>;
240 interrupt-parent = <&pio>;
242 interrupt-names = "IRQB";
243 interrupt-controller;
244 #interrupt-cells = <1>;
245 pinctrl-0 = <&mt6360_pins>;
248 compatible = "mediatek,mt6360-chg";
249 richtek,vinovp-microvolt = <14500000>;
251 otg_vbus_regulator: usb-otg-vbus-regulator {
252 regulator-name = "usb-otg-vbus";
253 regulator-min-microvolt = <4425000>;
254 regulator-max-microvolt = <5825000>;
259 compatible = "mediatek,mt6360-regulator";
260 LDO_VIN3-supply = <&mt6360_buck2>;
263 regulator-name = "emi_vdd2";
264 regulator-min-microvolt = <300000>;
265 regulator-max-microvolt = <1300000>;
266 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
269 regulator-always-on;
273 regulator-name = "emi_vddq";
274 regulator-min-microvolt = <300000>;
275 regulator-max-microvolt = <1300000>;
276 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
279 regulator-always-on;
283 regulator-name = "tp1_p3v0";
284 regulator-min-microvolt = <3300000>;
285 regulator-max-microvolt = <3300000>;
286 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
288 regulator-always-on;
292 regulator-name = "panel1_p1v8";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
300 regulator-name = "vmc_pmu";
301 regulator-min-microvolt = <1200000>;
302 regulator-max-microvolt = <3600000>;
303 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
308 regulator-name = "vmch_pmu";
309 regulator-min-microvolt = <2700000>;
310 regulator-max-microvolt = <3600000>;
311 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
317 regulator-name = "mt6360_ldo1";
318 regulator-min-microvolt = <500000>;
319 regulator-max-microvolt = <2100000>;
320 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
325 regulator-name = "emi_vmddr_en";
326 regulator-min-microvolt = <500000>;
327 regulator-max-microvolt = <2100000>;
328 regulator-allowed-modes = <MT6360_OPMODE_NORMAL
330 regulator-always-on;
337 domain-supply = <&mt6315_7_vbuck1>;
342 pinctrl-names = "default", "state_uhs";
343 pinctrl-0 = <&mmc0_default_pins>;
344 pinctrl-1 = <&mmc0_uhs_pins>;
345 bus-width = <8>;
346 max-frequency = <200000000>;
347 cap-mmc-highspeed;
348 mmc-hs200-1_8v;
349 mmc-hs400-1_8v;
350 cap-mmc-hw-reset;
351 no-sdio;
352 no-sd;
353 hs400-ds-delay = <0x14c11>;
354 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
355 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
356 non-removable;
360 pinctrl-names = "default", "state_uhs";
361 pinctrl-0 = <&mmc1_default_pins>;
362 pinctrl-1 = <&mmc1_uhs_pins>;
363 bus-width = <4>;
364 max-frequency = <200000000>;
365 cap-sd-highspeed;
366 sd-uhs-sdr50;
367 sd-uhs-sdr104;
368 no-mmc;
369 no-sdio;
370 vmmc-supply = <&mt6360_ldo5>;
371 vqmmc-supply = <&mt6360_ldo3>;
373 non-removable;
377 regulator-always-on;
381 regulator-always-on;
386 regulator-always-on;
390 regulator-min-microvolt = <3300000>;
391 regulator-max-microvolt = <3300000>;
395 regulator-always-on;
399 regulator-always-on;
403 regulator-always-on;
407 regulator-always-on;
411 mediatek,mic-type-0 = <1>; /* ACC */
412 mediatek,mic-type-1 = <3>; /* DCC */
413 mediatek,mic-type-2 = <1>; /* ACC */
417 pinctrl-names = "default", "idle";
418 pinctrl-0 = <&pcie0_default_pins>;
419 pinctrl-1 = <&pcie0_idle_pins>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pcie1_default_pins>;
434 audio_default_pins: audio-default-pins {
435 pins-cmd-dat {
452 disp_pwm1_default_pins: disp-pwm1-default-pins {
458 edp_panel_12v_en_pins: edp-panel-12v-en-pins {
461 output-high;
465 edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {
468 output-high;
472 eth_default_pins: eth-default-pins {
473 pins-cc {
478 drive-strength = <8>;
481 pins-mdio {
484 input-enable;
487 pins-power {
490 output-high;
493 pins-rxd {
500 pins-txd {
505 drive-strength = <8>;
509 eth_sleep_pins: eth-sleep-pins {
510 pins-cc {
517 pins-mdio {
520 input-disable;
521 bias-disable;
524 pins-rxd {
531 pins-txd {
539 gpio_key_pins: gpio-keys-pins {
542 bias-pull-up;
543 input-enable;
547 i2c0_pins: i2c0-pins {
551 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
552 drive-strength-microamp = <1000>;
556 i2c1_pins: i2c1-pins {
560 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
561 drive-strength-microamp = <1000>;
565 i2c2_pins: i2c2-pins {
569 bias-pull-up = <MTK_PULL_SET_RSEL_111>;
570 drive-strength = <6>;
574 i2c6_pins: i2c6-pins {
578 bias-pull-up;
582 mmc0_default_pins: mmc0-default-pins {
583 pins-clk {
585 drive-strength = <6>;
586 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
589 pins-cmd-dat {
599 input-enable;
600 drive-strength = <6>;
601 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
604 pins-rst {
606 drive-strength = <6>;
607 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
611 mmc0_uhs_pins: mmc0-uhs-pins {
612 pins-clk {
614 drive-strength = <8>;
615 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
618 pins-cmd-dat {
628 input-enable;
629 drive-strength = <8>;
630 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
633 pins-ds {
635 drive-strength = <8>;
636 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
639 pins-rst {
641 drive-strength = <8>;
642 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
646 mmc1_default_pins: mmc1-default-pins {
647 pins-clk {
649 drive-strength = <8>;
650 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
653 pins-cmd-dat {
659 input-enable;
660 drive-strength = <8>;
661 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
665 mmc1_uhs_pins: mmc1-uhs-pins {
666 pins-clk {
668 drive-strength = <8>;
669 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
672 pins-cmd-dat {
678 input-enable;
679 drive-strength = <8>;
680 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
684 mt6360_pins: mt6360-pins {
688 input-enable;
689 bias-pull-up;
693 pcie0_default_pins: pcie0-default-pins {
698 bias-pull-up;
702 pcie0_idle_pins: pcie0-idle-pins {
705 bias-disable;
706 output-low;
710 pcie1_default_pins: pcie1-default-pins {
715 bias-pull-up;
719 pwm0_default_pins: pwm0-default-pins {
720 pins-cmd-dat {
725 spi1_pins: spi1-pins {
731 bias-disable;
735 spi2_pins: spi-pins {
741 bias-disable;
745 touch_pins: touch-pins {
746 pins-irq {
748 input-enable;
749 bias-disable;
752 pins-reset {
754 output-high;
758 uart0_pins: uart0-pins {
765 uart1_pins: uart1-pins {
776 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
780 memory-region = <&scp_mem>;
785 pinctrl-0 = <&spi1_pins>;
786 pinctrl-names = "default";
787 mediatek,pad-select = <0>;
788 #address-cells = <1>;
789 #size-cells = <0>;
791 cs-gpios = <&pio 64 GPIO_ACTIVE_LOW>;
797 spi-max-frequency = <20000000>;
798 interrupts-extended = <&pio 16 IRQ_TYPE_LEVEL_LOW>;
799 vdd-supply = <&mt6359_vcn33_2_bt_ldo_reg>;
800 xceiver-supply = <&mt6359_vcn33_2_bt_ldo_reg>;
805 pinctrl-0 = <&spi2_pins>;
806 pinctrl-names = "default";
807 mediatek,pad-select = <0>;
808 #address-cells = <1>;
809 #size-cells = <0>;
814 #address-cells = <2>;
815 #size-cells = <0>;
818 compatible = "mediatek,mt6315-regulator";
823 regulator-compatible = "vbuck1";
824 regulator-name = "Vbcpu";
825 regulator-min-microvolt = <300000>;
826 regulator-max-microvolt = <1193750>;
827 regulator-enable-ramp-delay = <256>;
828 regulator-allowed-modes = <0 1 2>;
829 regulator-always-on;
835 compatible = "mediatek,mt6315-regulator";
840 regulator-compatible = "vbuck1";
841 regulator-name = "Vgpu";
842 regulator-min-microvolt = <300000>;
843 regulator-max-microvolt = <1193750>;
844 regulator-enable-ramp-delay = <256>;
845 regulator-allowed-modes = <0 1 2>;
858 u3port1: usb-phy@700 {
859 mediatek,force-mode;
872 pinctrl-0 = <&uart0_pins>;
873 pinctrl-names = "default";
878 pinctrl-0 = <&uart1_pins>;
879 pinctrl-names = "default";
888 vusb33-supply = <&mt6359_vusb_ldo_reg>;
893 vusb33-supply = <&mt6359_vusb_ldo_reg>;
898 vusb33-supply = <&mt6359_vusb_ldo_reg>;
907 vusb33-supply = <&mt6359_vusb_ldo_reg>;