Lines Matching +full:0 +full:x55000000
42 reg = <0 0x40000000 0x2 0x00000000>;
52 * +-----------------------+ 0x43e0_0000
54 * +-----------------------+ 0x43c0_0000
56 * + TZDRAM +--------------+ 0x4340_0000
58 * +-----------------------+ 0x4320_0000
62 reg = <0 0x43200000 0 0x00c00000>;
67 reg = <0 0x50000000 0 0x2900000>;
74 reg = <0 0x54600000 0x0 0x200000>;
79 reg = <0 0x55000000 0 0x1400000>; /* 20 MB */
84 reg = <0 0x57000000 0 0x1400000>; /* 20 MB */
88 common_fixed_5v: regulator-0 {
106 pinctrl-0 = <&edp_panel_3v3_en_pins>;
195 pinctrl-0 = <&i2c0_pins>;
201 reg = <0x5d>;
209 pinctrl-0 = <&touch_pins>;
215 pinctrl-0 = <&i2c1_pins>;
222 pinctrl-0 = <&i2c2_pins>;
229 pinctrl-0 = <&i2c3_pins>;
236 pinctrl-0 = <&i2c4_pins>;
244 pinctrl-0 = <&i2c5_pins>;
251 pinctrl-0 = <&i2c6_pins>;
259 pinctrl-0 = <&mmc0_default_pins>;
270 hs400-ds-delay = <0x1481b>;
279 pinctrl-0 = <&mmc1_default_pins>;
334 mediatek,mic-type-0 = <1>; /* ACC */
828 pinctrl-0 = <&uart0_pins>;
834 pinctrl-0 = <&uart1_pins>;
840 pinctrl-0 = <&uart2_pins>;
846 pinctrl-0 = <&spi2_pins>;
848 mediatek,pad-select = <0>;
850 #size-cells = <0>;