Lines Matching +full:1 +full:b030000
50 #address-cells = <1>;
134 performance-domains = <&performance 1>;
153 performance-domains = <&performance 1>;
172 performance-domains = <&performance 1>;
191 performance-domains = <&performance 1>;
335 clock-mult = <1>;
356 #performance-domain-cells = <1>;
465 #redistributor-regions = <1>;
477 ppi_cluster1: interrupt-partition-1 {
486 #clock-cells = <1>;
492 #clock-cells = <1>;
493 #reset-cells = <1>;
499 #clock-cells = <1>;
530 #address-cells = <1>;
532 #power-domain-cells = <1>;
537 #address-cells = <1>;
539 #power-domain-cells = <1>;
547 #address-cells = <1>;
549 #power-domain-cells = <1>;
609 "vppsys0-0", "vppsys0-1", "vppsys0-2", "vppsys0-3",
616 #address-cells = <1>;
618 #power-domain-cells = <1>;
645 clock-names = "vdosys0", "vdosys0-0", "vdosys0-1",
649 #address-cells = <1>;
651 #power-domain-cells = <1>;
659 "vppsys1-1";
670 clock-names = "wepsys-0", "wepsys-1", "wepsys-2",
707 "vdosys1-1", "vdosys1-2";
709 #address-cells = <1>;
711 #power-domain-cells = <1>;
737 clock-names = "img-0", "img-1";
739 #address-cells = <1>;
741 #power-domain-cells = <1>;
753 clock-names = "ipe", "ipe-0", "ipe-1";
766 clock-names = "cam-0", "cam-1", "cam-2", "cam-3",
769 #address-cells = <1>;
771 #power-domain-cells = <1>;
833 #address-cells = <1>;
836 #power-domain-cells = <1>;
857 #reset-cells = <1>;
863 #clock-cells = <1>;
909 #iommu-cells = <1>;
941 #clock-cells = <1>;
1096 #io-channel-cells = <1>;
1103 #clock-cells = <1>;
1109 #address-cells = <1>;
1127 nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
1128 #thermal-sensor-cells = <1>;
1169 #address-cells = <1>;
1183 #address-cells = <1>;
1197 #address-cells = <1>;
1211 #address-cells = <1>;
1225 #address-cells = <1>;
1293 #address-cells = <1>;
1436 nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
1437 #thermal-sensor-cells = <1>;
1565 #interrupt-cells = <1>;
1567 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1568 <0 0 0 2 &pcie_intc0 1>,
1576 #interrupt-cells = <1>;
1617 #interrupt-cells = <1>;
1619 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
1620 <0 0 0 2 &pcie_intc1 1>,
1628 #interrupt-cells = <1>;
1641 #address-cells = <1>;
1649 #address-cells = <1>;
1650 #size-cells = <1>;
1651 u3_tx_imp_p0: usb3-tx-imp@184,1 {
1663 comb_tx_imp_p1: usb3-tx-imp@186,1 {
1675 u2_intr_p0: usb2-intr-p0@188,1 {
1683 u2_intr_p2: usb2-intr-p2@189,1 {
1691 pciephy_rx_ln1: pciephy-rx-ln1@190,1 {
1699 pciephy_tx_ln1_pmos: pciephy-tx-ln1-pmos@191,1 {
1707 pciephy_tx_ln0_nmos: pciephy-tx-ln0-nmos@192,1 {
1719 dp_calibration: dp-data@1ac {
1722 lvts_efuse_data1: lvts1-calib@1bc {
1725 lvts_efuse_data2: lvts2-calib@1d0 {
1738 #address-cells = <1>;
1739 #size-cells = <1>;
1747 #phy-cells = <1>;
1753 #address-cells = <1>;
1754 #size-cells = <1>;
1762 #phy-cells = <1>;
1792 clock-div = <1>;
1796 #address-cells = <1>;
1807 clock-div = <1>;
1811 #address-cells = <1>;
1822 clock-div = <1>;
1826 #address-cells = <1>;
1834 #clock-cells = <1>;
1843 clock-div = <1>;
1847 #address-cells = <1>;
1858 clock-div = <1>;
1862 #address-cells = <1>;
1873 clock-div = <1>;
1877 #address-cells = <1>;
1888 clock-div = <1>;
1892 #address-cells = <1>;
1903 clock-div = <1>;
1907 #address-cells = <1>;
1915 #clock-cells = <1>;
1920 #address-cells = <1>;
1921 #size-cells = <1>;
1931 #phy-cells = <1>;
1943 #phy-cells = <1>;
1949 #address-cells = <1>;
1950 #size-cells = <1>;
1959 #phy-cells = <1>;
1971 #phy-cells = <1>;
2024 #clock-cells = <1>;
2030 #clock-cells = <1>;
2049 #dma-cells = <1>;
2141 #dma-cells = <1>;
2207 #iommu-cells = <1>;
2214 #clock-cells = <1>;
2220 #clock-cells = <1>;
2226 #clock-cells = <1>;
2255 #clock-cells = <1>;
2318 #dma-cells = <1>;
2330 #dma-cells = <1>;
2342 #dma-cells = <1>;
2548 #dma-cells = <1>;
2560 #dma-cells = <1>;
2572 #dma-cells = <1>;
2578 #clock-cells = <1>;
2618 #clock-cells = <1>;
2635 #clock-cells = <1>;
2641 #clock-cells = <1>;
2658 #clock-cells = <1>;
2675 #clock-cells = <1>;
2770 #clock-cells = <1>;
2776 #clock-cells = <1>;
2782 #clock-cells = <1>;
2788 #clock-cells = <1>;
2794 #clock-cells = <1>;
2824 #clock-cells = <1>;
2933 #clock-cells = <1>;
2950 #clock-cells = <1>;
2967 #clock-cells = <1>;
2973 #clock-cells = <1>;
2976 vencsys: clock-controller@1a000000 {
2979 #clock-cells = <1>;
2982 larb19: larb@1a010000 {
2993 venc: video-codec@1a020000 {
3029 jpgdec@1a040000 {
3044 jpgdec@1a050000 {
3059 jpgdec@1b040000 {
3075 vencsys_core1: clock-controller@1b000000 {
3078 #clock-cells = <1>;
3081 vdosys0: syscon@1c01a000 {
3085 #clock-cells = <1>;
3101 jpgenc@1a030000 {
3114 jpgenc@1b030000 {
3128 larb20: larb@1b010000 {
3140 ovl0: ovl@1c000000 {
3150 rdma0: rdma@1c002000 {
3160 color0: color@1c003000 {
3169 ccorr0: ccorr@1c004000 {
3178 aal0: aal@1c005000 {
3187 gamma0: gamma@1c006000 {
3196 dither0: dither@1c007000 {
3205 dsi0: dsi@1c008000 {
3219 dsc0: dsc@1c009000 {
3228 dsi1: dsi@1c012000 {
3242 merge0: merge@1c014000 {
3251 dp_intf0: dp-intf@1c015000 {
3262 mutex: mutex@1c016000 {
3272 larb0: larb@1c018000 {
3284 larb1: larb@1c019000 {
3287 mediatek,larb-id = <1>;
3296 vdosys1: syscon@1c100000 {
3299 mboxes = <&gce0 1 CMDQ_THR_PRIO_4>;
3301 #clock-cells = <1>;
3302 #reset-cells = <1>;
3305 smi_common_vdo: smi@1c01b000 {
3317 iommu_vdo: iommu@1c01f000 {
3325 #iommu-cells = <1>;
3331 mutex1: mutex@1c101000 {
3343 larb2: larb@1c102000 {
3355 larb3: larb@1c103000 {
3367 vdo1_rdma0: dma-controller@1c104000 {
3375 #dma-cells = <1>;
3378 vdo1_rdma1: dma-controller@1c105000 {
3386 #dma-cells = <1>;
3389 vdo1_rdma2: dma-controller@1c106000 {
3397 #dma-cells = <1>;
3400 vdo1_rdma3: dma-controller@1c107000 {
3408 #dma-cells = <1>;
3411 vdo1_rdma4: dma-controller@1c108000 {
3419 #dma-cells = <1>;
3422 vdo1_rdma5: dma-controller@1c109000 {
3430 #dma-cells = <1>;
3433 vdo1_rdma6: dma-controller@1c10a000 {
3441 #dma-cells = <1>;
3444 vdo1_rdma7: dma-controller@1c10b000 {
3452 #dma-cells = <1>;
3455 merge1: vpp-merge@1c10c000 {
3468 merge2: vpp-merge@1c10d000 {
3481 merge3: vpp-merge@1c10e000 {
3494 merge4: vpp-merge@1c10f000 {
3507 merge5: vpp-merge@1c110000 {
3520 dp_intf1: dp-intf@1c113000 {
3532 ethdr0: hdr-engine@1c114000 {
3580 edp_tx: edp-tx@1c500000 {
3591 dp_tx: dp-tx@1c600000 {