Lines Matching refs:infracfg
459 infracfg: syscon@10001000 { label
460 compatible = "mediatek,mt8192-infracfg", "syscon";
512 <&infracfg CLK_INFRA_AUDIO_26M_B>,
513 <&infracfg CLK_INFRA_AUDIO>;
515 mediatek,infracfg = <&infracfg>;
521 clocks = <&infracfg CLK_INFRA_PMIC_CONN>;
523 mediatek,infracfg = <&infracfg>;
538 mediatek,infracfg = <&infracfg>;
579 mediatek,infracfg = <&infracfg>;
593 mediatek,infracfg = <&infracfg>;
603 mediatek,infracfg = <&infracfg>;
613 mediatek,infracfg = <&infracfg>;
622 mediatek,infracfg = <&infracfg>;
631 mediatek,infracfg = <&infracfg>;
642 mediatek,infracfg = <&infracfg>;
667 mediatek,infracfg = <&infracfg>;
722 clocks = <&infracfg CLK_INFRA_PMIC_AP>,
723 <&infracfg CLK_INFRA_PMIC_TMR>;
734 clocks = <&infracfg CLK_INFRA_PMIC_AP>,
735 <&infracfg CLK_INFRA_PMIC_TMR>,
749 clocks = <&infracfg CLK_INFRA_GCE>;
766 clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;
776 clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>;
796 <&infracfg CLK_INFRA_SPI0>;
805 clocks = <&infracfg CLK_INFRA_THERM>;
806 resets = <&infracfg MT8192_INFRA_RST0_THERM_CTRL_SWRST>;
816 clocks = <&infracfg CLK_INFRA_THERM>;
820 resets = <&infracfg MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST>;
830 <&infracfg CLK_INFRA_DISP_PWM>;
844 <&infracfg CLK_INFRA_SPI1>;
858 <&infracfg CLK_INFRA_SPI2>;
872 <&infracfg CLK_INFRA_SPI3>;
886 <&infracfg CLK_INFRA_SPI4>;
900 <&infracfg CLK_INFRA_SPI5>;
914 <&infracfg CLK_INFRA_SPI6>;
928 <&infracfg CLK_INFRA_SPI7>;
940 clocks = <&infracfg CLK_INFRA_SCPSYS>;
959 clocks = <&infracfg CLK_INFRA_SSUSB>,
963 <&infracfg CLK_INFRA_SSUSB_XHCI>;
982 mediatek,infracfg = <&infracfg>;
1005 <&infracfg CLK_INFRA_AUDIO>,
1006 <&infracfg CLK_INFRA_AUDIO_26M_B>,
1107 clocks = <&infracfg CLK_INFRA_PCIE_PL_P_250M>,
1108 <&infracfg CLK_INFRA_PCIE_TL_26M>,
1109 <&infracfg CLK_INFRA_PCIE_TL_96M>,
1110 <&infracfg CLK_INFRA_PCIE_TL_32K>,
1111 <&infracfg CLK_INFRA_PCIE_PERI_26M>,
1112 <&infracfg CLK_INFRA_PCIE_TOP_H_133M>;
1140 <&infracfg CLK_INFRA_FLASHIF_SFLASH>,
1141 <&infracfg CLK_INFRA_FLASHIF_TOP_H_133M>;
1154 clocks = <&infracfg CLK_INFRA_THERM>;
1155 resets = <&infracfg MT8192_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
1190 <&infracfg CLK_INFRA_AP_DMA>;
1210 <&infracfg CLK_INFRA_AP_DMA>;
1224 <&infracfg CLK_INFRA_AP_DMA>;
1238 <&infracfg CLK_INFRA_AP_DMA>;
1258 <&infracfg CLK_INFRA_AP_DMA>;
1272 <&infracfg CLK_INFRA_AP_DMA>;
1286 <&infracfg CLK_INFRA_AP_DMA>;
1306 <&infracfg CLK_INFRA_AP_DMA>;
1358 <&infracfg CLK_INFRA_AP_DMA>;
1372 <&infracfg CLK_INFRA_AP_DMA>;