Lines Matching full:mmsys
573 <&mmsys CLK_MM_SMI_INFRA>,
574 <&mmsys CLK_MM_SMI_COMMON>,
575 <&mmsys CLK_MM_SMI_GALS>,
576 <&mmsys CLK_MM_SMI_IOMMU>;
1452 mmsys: syscon@14000000 { label
1453 compatible = "mediatek,mt8192-mmsys", "syscon";
1466 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1476 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1477 <&mmsys CLK_MM_SMI_INFRA>,
1478 <&mmsys CLK_MM_SMI_GALS>,
1479 <&mmsys CLK_MM_SMI_GALS>;
1508 clocks = <&mmsys CLK_MM_DISP_OVL0>;
1520 clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
1531 clocks = <&mmsys CLK_MM_DISP_RDMA0>;
1544 clocks = <&mmsys CLK_MM_DISP_COLOR0>;
1553 clocks = <&mmsys CLK_MM_DISP_CCORR0>;
1563 clocks = <&mmsys CLK_MM_DISP_AAL0>;
1573 clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
1582 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
1592 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
1600 clocks = <&mmsys CLK_MM_DSI0>,
1601 <&mmsys CLK_MM_DSI_DSI0>,
1607 resets = <&mmsys MT8192_MMSYS_SW0_RST_B_DISP_DSI0>;
1620 clocks = <&mmsys CLK_MM_DISP_OVL2_2L>;
1632 clocks = <&mmsys CLK_MM_DISP_RDMA4>;
1642 clocks = <&mmsys CLK_MM_DPI_DPI0>,
1643 <&mmsys CLK_MM_DISP_DPI0>,
1658 clocks = <&mmsys CLK_MM_SMI_IOMMU>;