dts/mediatek/mt8188.dtsi

904 		topckgen: syscon@10000000 {  label
905 			compatible = "mediatek,mt8188-topckgen", "syscon";
961 						clocks = <&topckgen CLK_APMIXED_MFGPLL>,
962 							 <&topckgen CLK_TOP_MFG_CORE_TMP>;
988 					clocks = <&topckgen CLK_TOP_VPP>,
989 						 <&topckgen CLK_TOP_CAM>,
990 						 <&topckgen CLK_TOP_CCU>,
991 						 <&topckgen CLK_TOP_IMG>,
992 						 <&topckgen CLK_TOP_VENC>,
993 						 <&topckgen CLK_TOP_VDEC>,
994 						 <&topckgen CLK_TOP_WPE_VPP>,
995 						 <&topckgen CLK_TOP_CFGREG_CLOCK_EN_VPP0>,
996 						 <&topckgen CLK_TOP_CFGREG_F26M_VPP0>,
1032 						clocks = <&topckgen CLK_TOP_CFGREG_CLOCK_EN_VDO0>,
1033 							 <&topckgen CLK_TOP_CFGREG_F26M_VDO0>,
1051 							clocks = <&topckgen CLK_TOP_CFGREG_CLOCK_EN_VPP1>,
1052 								 <&topckgen CLK_TOP_CFGREG_F26M_VPP1>,
1082 							clocks = <&topckgen CLK_TOP_CAM>,
1083 								 <&topckgen CLK_TOP_CCU>,
1084 								 <&topckgen CLK_TOP_CCU_AHB>,
1085 								 <&topckgen CLK_TOP_CFGREG_CLOCK_ISP_AXI_GALS>;
1133 							clocks = <&topckgen CLK_TOP_CFGREG_CLOCK_EN_VDO1>,
1134 								 <&topckgen CLK_TOP_CFGREG_F26M_VDO1>,
1147 								clocks = <&topckgen CLK_TOP_HDMI_APB>,
1148 									 <&topckgen CLK_TOP_HDCP_24M>;
1200 					clocks = <&topckgen CLK_TOP_SENINF>,
1201 						 <&topckgen CLK_TOP_SENINF1>;
1213 					clocks = <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>,
1214 						 <&topckgen CLK_TOP_ADSP>;
1230 							clocks = <&topckgen CLK_TOP_ASM_H>;
1238 							clocks = <&topckgen CLK_TOP_A1SYS_HP>,
1239 								 <&topckgen CLK_TOP_AUD_INTBUS>,
1381 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1382 				 <&topckgen CLK_TOP_SPI>,
1405 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1406 				 <&topckgen CLK_TOP_SPI>,
1418 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1419 				 <&topckgen CLK_TOP_SPI>,
1431 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1432 				 <&topckgen CLK_TOP_SPI>,
1444 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1445 				 <&topckgen CLK_TOP_SPI>,
1457 			clocks = <&topckgen CLK_TOP_UNIVPLL_D6_D2>,
1458 				 <&topckgen CLK_TOP_SPI>,
1472 			assigned-clocks = <&topckgen CLK_TOP_USB_TOP>,
1473 					  <&topckgen CLK_TOP_SSUSB_XHCI>;
1474 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1475 						 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1477 				 <&topckgen CLK_TOP_SSUSB_TOP_REF>,
1490 			clocks = <&topckgen CLK_TOP_MSDC50_0>,
1503 			clocks = <&topckgen CLK_TOP_MSDC30_1>,
1507 			assigned-clocks = <&topckgen CLK_TOP_MSDC30_1>;
1508 			assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
1578 			assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_3P>,
1579 					  <&topckgen CLK_TOP_USB_TOP_3P>;
1580 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1581 						 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1583 				 <&topckgen CLK_TOP_SSUSB_TOP_P3_REF>,
1596 			assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_2P>,
1597 					  <&topckgen CLK_TOP_USB_TOP_2P>;
1598 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1599 						 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1601 				 <&topckgen CLK_TOP_SSUSB_TOP_P2_REF>,
1612 			clocks = <&topckgen CLK_TOP_SPINOR>,
1616 			assigned-clocks = <&topckgen CLK_TOP_SPINOR>;
1664 				clocks = <&topckgen CLK_TOP_SSUSB_PHY_P2_REF>,
1680 				clocks = <&topckgen CLK_TOP_SSUSB_PHY_REF>,
1705 				clocks = <&topckgen CLK_TOP_SSUSB_PHY_P3_REF>,