Lines Matching full:vppsys0
997 <&vppsys0 CLK_VPP0_SMI_COMMON_MMSRAM>,
998 <&vppsys0 CLK_VPP0_GALS_VDO0_LARB0_MMSRAM>,
999 <&vppsys0 CLK_VPP0_GALS_VDO0_LARB1_MMSRAM>,
1000 <&vppsys0 CLK_VPP0_GALS_VENCSYS_MMSRAM>,
1001 <&vppsys0 CLK_VPP0_GALS_VENCSYS_CORE1_MMSRAM>,
1002 <&vppsys0 CLK_VPP0_GALS_INFRA_MMSRAM>,
1003 <&vppsys0 CLK_VPP0_GALS_CAMSYS_MMSRAM>,
1004 <&vppsys0 CLK_VPP0_GALS_VPP1_LARB5_MMSRAM>,
1005 <&vppsys0 CLK_VPP0_GALS_VPP1_LARB6_MMSRAM>,
1006 <&vppsys0 CLK_VPP0_SMI_REORDER_MMSRAM>,
1007 <&vppsys0 CLK_VPP0_SMI_IOMMU>,
1008 <&vppsys0 CLK_VPP0_GALS_IMGSYS_CAMSYS>,
1009 <&vppsys0 CLK_VPP0_GALS_EMI0_EMI1>,
1010 <&vppsys0 CLK_VPP0_SMI_SUB_COMMON_REORDER>,
1011 <&vppsys0 CLK_VPP0_SMI_RSI>,
1012 <&vppsys0 CLK_VPP0_SMI_COMMON_LARB4>,
1013 <&vppsys0 CLK_VPP0_GALS_VDEC_VDEC_CORE1>,
1014 <&vppsys0 CLK_VPP0_GALS_VPP1_WPESYS>,
1015 <&vppsys0 CLK_VPP0_GALS_VDO0_VDO1_VENCSYS_CORE1>;
1781 vppsys0: clock-controller@14000000 { label
1782 compatible = "mediatek,mt8188-vppsys0";