dts/mediatek/mt8186.dtsi

848 		topckgen: syscon@10000000 {  label
849 			compatible = "mediatek,mt8186-topckgen", "syscon";
900 					clocks = <&topckgen CLK_TOP_MFG>;
927 					clocks = <&topckgen CLK_TOP_SENINF>,
928 						 <&topckgen CLK_TOP_SENINF1>;
936 					clocks = <&topckgen CLK_TOP_USB_TOP>,
952 					clocks = <&topckgen CLK_TOP_AUDIODSP>,
953 						 <&topckgen CLK_TOP_ADSP_BUS>;
982 					clocks = <&topckgen CLK_TOP_DISP>,
983 						 <&topckgen CLK_TOP_MDP>,
1000 						clocks = <&topckgen CLK_TOP_VDEC>,
1009 						clocks = <&topckgen CLK_TOP_SENINF>,
1010 							 <&topckgen CLK_TOP_SENINF1>,
1011 							 <&topckgen CLK_TOP_SENINF2>,
1012 							 <&topckgen CLK_TOP_SENINF3>,
1014 							 <&topckgen CLK_TOP_CAMTM>,
1015 							 <&topckgen CLK_TOP_CAM>;
1039 							 <&topckgen CLK_TOP_IMG1>;
1054 						clocks = <&topckgen CLK_TOP_IPE>,
1070 						clocks = <&topckgen CLK_TOP_VENC>,
1079 						clocks = <&topckgen CLK_TOP_WPE>,
1121 				 <&topckgen CLK_TOP_SPMI_MST>;
1123 			assigned-clocks = <&topckgen CLK_TOP_SPMI_MST>;
1124 			assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
1160 			clocks = <&topckgen CLK_TOP_AUDIODSP>, <&topckgen CLK_TOP_ADSP_BUS>;
1162 			assigned-clocks = <&topckgen CLK_TOP_AUDIODSP>,
1163 					  <&topckgen CLK_TOP_ADSP_BUS>;
1164 			assigned-clock-parents = <&clk26m>, <&topckgen CLK_TOP_MAINPLL_D2_D2>;
1188 			clocks = <&topckgen CLK_TOP_SPINOR>,
1193 			assigned-clocks = <&topckgen CLK_TOP_SPINOR>;
1194 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3_D8>;
1359 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1360 				 <&topckgen CLK_TOP_SPI>,
1394 			clocks = <&topckgen CLK_TOP_DISP_PWM>,
1406 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1407 				 <&topckgen CLK_TOP_SPI>,
1419 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1420 				 <&topckgen CLK_TOP_SPI>,
1432 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1433 				 <&topckgen CLK_TOP_SPI>,
1445 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1446 				 <&topckgen CLK_TOP_SPI>,
1458 			clocks = <&topckgen CLK_TOP_MAINPLL_D5>,
1459 				 <&topckgen CLK_TOP_SPI>,
1500 				 <&topckgen CLK_TOP_AUDIO>,
1501 				 <&topckgen CLK_TOP_AUD_INTBUS>,
1502 				 <&topckgen CLK_TOP_MAINPLL_D2_D4>,
1503 				 <&topckgen CLK_TOP_AUD_1>,
1505 				 <&topckgen CLK_TOP_AUD_2>,
1507 				 <&topckgen CLK_TOP_AUD_ENGEN1>,
1508 				 <&topckgen CLK_TOP_APLL1_D8>,
1509 				 <&topckgen CLK_TOP_AUD_ENGEN2>,
1510 				 <&topckgen CLK_TOP_APLL2_D8>,
1511 				 <&topckgen CLK_TOP_APLL_I2S0_MCK_SEL>,
1512 				 <&topckgen CLK_TOP_APLL_I2S1_MCK_SEL>,
1513 				 <&topckgen CLK_TOP_APLL_I2S2_MCK_SEL>,
1514 				 <&topckgen CLK_TOP_APLL_I2S4_MCK_SEL>,
1515 				 <&topckgen CLK_TOP_APLL_TDMOUT_MCK_SEL>,
1516 				 <&topckgen CLK_TOP_APLL12_CK_DIV0>,
1517 				 <&topckgen CLK_TOP_APLL12_CK_DIV1>,
1518 				 <&topckgen CLK_TOP_APLL12_CK_DIV2>,
1519 				 <&topckgen CLK_TOP_APLL12_CK_DIV4>,
1520 				 <&topckgen CLK_TOP_APLL12_CK_DIV_TDMOUT_M>,
1521 				 <&topckgen CLK_TOP_AUDIO_H>,
1551 			mediatek,topckgen = <&topckgen>;
1561 			clocks = <&topckgen CLK_TOP_USB_TOP>,
1579 				clocks = <&topckgen CLK_TOP_USB_TOP>,
1597 			clocks = <&topckgen CLK_TOP_MSDC50_0>,
1603 			assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>;
1613 			clocks = <&topckgen CLK_TOP_MSDC30_1>,
1618 			assigned-clocks = <&topckgen CLK_TOP_MSDC30_1>;
1619 			assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
1857 			clocks = <&topckgen CLK_TOP_DPI>,
1861 			assigned-clocks = <&topckgen CLK_TOP_DPI>;
1862 			assigned-clock-parents = <&topckgen CLK_TOP_TVDPLL_D2>;
2038 				clocks = <&topckgen CLK_TOP_VDEC>,
2041 					 <&topckgen CLK_TOP_UNIVPLL_D3>;
2043 				assigned-clocks = <&topckgen CLK_TOP_VDEC>;
2044 				assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;
2098 			assigned-clocks = <&topckgen CLK_TOP_VENC>;
2099 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;