Lines Matching +full:regulator +full:- +full:coupled +full:- +full:max +full:- +full:spread
1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
28 stdout-path = "serial0:921600n8";
31 reserved-memory {
32 #address-cells = <2>;
33 #size-cells = <2>;
36 scp_mem_reserved: scp-mem@50000000 {
37 compatible = "shared-dma-pool";
39 no-map;
44 compatible = "gpio-leds";
46 led-red {
49 default-state = "off";
52 led-green {
55 default-state = "off";
61 pullup-uv = <1800000>;
62 pullup-ohm = <390000>;
63 pulldown-ohm = <0>;
64 io-channels = <&auxadc 0>;
73 mali-supply = <&mt6358_vgpu_reg>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&i2c_pins_0>;
80 clock-frequency = <100000>;
84 pinctrl-names = "default";
85 pinctrl-0 = <&i2c_pins_1>;
87 clock-frequency = <100000>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&i2c_pins_2>;
94 clock-frequency = <100000>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&i2c_pins_3>;
101 clock-frequency = <100000>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&i2c_pins_4>;
108 clock-frequency = <100000>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&i2c_pins_5>;
115 clock-frequency = <100000>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&i2c6_pins>;
122 clock-frequency = <100000>;
126 pinctrl-names = "default";
127 pinctrl-0 = <&keyboard_pins>;
131 keypad,num-rows = <2>;
132 keypad,num-columns = <1>;
133 debounce-delay-ms = <32>;
134 mediatek,keys-per-group = <2>;
139 pinctrl-names = "default", "state_uhs";
140 pinctrl-0 = <&mmc0_pins_default>;
141 pinctrl-1 = <&mmc0_pins_uhs>;
142 bus-width = <8>;
143 max-frequency = <200000000>;
144 cap-mmc-highspeed;
145 mmc-hs200-1_8v;
146 mmc-hs400-1_8v;
147 cap-mmc-hw-reset;
148 no-sdio;
149 no-sd;
150 hs400-ds-delay = <0x12814>;
151 vmmc-supply = <&mt6358_vemc_reg>;
152 vqmmc-supply = <&mt6358_vio18_reg>;
153 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
154 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
155 non-removable;
160 pinctrl-names = "default", "state_uhs";
161 pinctrl-0 = <&mmc1_pins_default>;
162 pinctrl-1 = <&mmc1_pins_uhs>;
163 bus-width = <4>;
164 max-frequency = <200000000>;
165 cap-sd-highspeed;
166 sd-uhs-sdr50;
167 sd-uhs-sdr104;
168 cap-sdio-irq;
169 no-mmc;
170 no-sd;
171 vmmc-supply = <&mt6358_vmch_reg>;
172 vqmmc-supply = <&mt6358_vmc_reg>;
173 keep-power-in-suspend;
174 wakeup-source;
175 non-removable;
179 regulator-min-microvolt = <625000>;
180 regulator-max-microvolt = <900000>;
182 regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
183 regulator-coupled-max-spread = <100000>;
187 regulator-min-microvolt = <850000>;
188 regulator-max-microvolt = <1000000>;
190 regulator-coupled-with = <&mt6358_vgpu_reg>;
191 regulator-coupled-max-spread = <100000>;
199 mediatek,pull-up-adv = <3>;
207 mediatek,pull-up-adv = <3>;
215 mediatek,pull-up-adv = <3>;
223 mediatek,pull-up-adv = <3>;
231 mediatek,pull-up-adv = <3>;
239 mediatek,pull-up-adv = <3>;
247 mediatek,pull-up-adv = <3>;
259 mmc0_pins_default: mmc0-pins-default {
270 input-enable;
271 drive-strength = <MTK_DRIVE_14mA>;
272 mediatek,pull-up-adv = <01>;
277 drive-strength = <MTK_DRIVE_14mA>;
278 mediatek,pull-down-adv = <10>;
283 drive-strength = <MTK_DRIVE_14mA>;
284 mediatek,pull-down-adv = <01>;
288 mmc0_pins_uhs: mmc0-pins-uhs {
299 input-enable;
300 drive-strength = <MTK_DRIVE_14mA>;
301 mediatek,pull-up-adv = <01>;
306 drive-strength = <MTK_DRIVE_14mA>;
307 mediatek,pull-down-adv = <10>;
312 drive-strength = <MTK_DRIVE_14mA>;
313 mediatek,pull-down-adv = <10>;
318 drive-strength = <MTK_DRIVE_14mA>;
319 mediatek,pull-up-adv = <01>;
323 mmc1_pins_default: mmc1-pins-default {
330 input-enable;
331 mediatek,pull-up-adv = <10>;
336 input-enable;
337 mediatek,pull-down-adv = <10>;
342 output-high;
346 mmc1_pins_uhs: mmc1-pins-uhs {
353 drive-strength = <6>;
354 input-enable;
355 mediatek,pull-up-adv = <10>;
360 drive-strength = <8>;
361 mediatek,pull-down-adv = <10>;
362 input-enable;
368 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
372 domain-supply = <&mt6358_vgpu_reg>;
376 proc-supply = <&mt6358_vproc12_reg>;
380 proc-supply = <&mt6358_vproc12_reg>;
384 proc-supply = <&mt6358_vproc12_reg>;
388 proc-supply = <&mt6358_vproc12_reg>;
392 proc-supply = <&mt6358_vproc11_reg>;
396 proc-supply = <&mt6358_vproc11_reg>;
400 proc-supply = <&mt6358_vproc11_reg>;
404 proc-supply = <&mt6358_vproc11_reg>;