Lines Matching +full:regulator +full:- +full:coupled +full:- +full:with
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <®_vsys>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
51 enable-active-high;
52 vin-supply = <&pp1800_alw>;
56 compatible = "regulator-fixed";
57 regulator-name = "lcd_pp3300";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 regulator-always-on;
61 regulator-boot-on;
65 compatible = "regulator-fixed";
66 regulator-name = "mmc1_power";
67 vin-supply = <&pp3300_alw>;
71 compatible = "regulator-fixed";
72 regulator-name = "mmc1_io";
73 vin-supply = <&pp1800_alw>;
77 compatible = "regulator-fixed";
78 regulator-name = "pp1800_alw";
79 regulator-always-on;
80 regulator-boot-on;
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <1800000>;
83 vin-supply = <®_vsys>;
87 compatible = "regulator-fixed";
88 regulator-name = "pp3300_alw";
89 regulator-always-on;
90 regulator-boot-on;
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 vin-supply = <®_vsys>;
96 /* system wide semi-regulated power rail from charger */
97 reg_vsys: regulator-vsys {
98 compatible = "regulator-fixed";
99 regulator-name = "vsys";
100 regulator-always-on;
101 regulator-boot-on;
104 reserved_memory: reserved-memory {
105 #address-cells = <2>;
106 #size-cells = <2>;
110 compatible = "shared-dma-pool";
112 no-map;
116 sound: mt8183-sound {
118 pinctrl-names = "default",
121 pinctrl-0 = <&aud_pins_default>;
122 pinctrl-1 = <&aud_pins_tdm_out_on>;
123 pinctrl-2 = <&aud_pins_tdm_out_off>;
127 btsco: bt-sco {
128 compatible = "linux,bt-sco";
131 wifi_pwrseq: wifi-pwrseq {
132 compatible = "mmc-pwrseq-simple";
133 pinctrl-names = "default";
134 pinctrl-0 = <&wifi_pins_pwrseq>;
137 reset-gpios = <&pio 119 1>;
140 wifi_wakeup: wifi-wakeup {
141 compatible = "gpio-keys";
142 pinctrl-names = "default";
143 pinctrl-0 = <&wifi_pins_wakeup>;
145 wifi_wakeup_event: event-wowlan {
149 wakeup-source;
153 tboard_thermistor1: thermal-sensor1 {
154 compatible = "generic-adc-thermal";
155 #thermal-sensor-cells = <0>;
156 io-channels = <&auxadc 0>;
157 io-channel-names = "sensor-channel";
158 temperature-lookup-table = < (-5000) 1553
187 tboard_thermistor2: thermal-sensor2 {
188 compatible = "generic-adc-thermal";
189 #thermal-sensor-cells = <0>;
190 io-channels = <&auxadc 1>;
191 io-channel-names = "sensor-channel";
192 temperature-lookup-table = < (-5000) 1553
227 proc-supply = <&mt6358_vproc12_reg>;
231 proc-supply = <&mt6358_vproc12_reg>;
235 proc-supply = <&mt6358_vproc12_reg>;
239 proc-supply = <&mt6358_vproc12_reg>;
243 proc-supply = <&mt6358_vproc12_reg>;
247 proc-supply = <&mt6358_vproc11_reg>;
251 proc-supply = <&mt6358_vproc11_reg>;
255 proc-supply = <&mt6358_vproc11_reg>;
259 proc-supply = <&mt6358_vproc11_reg>;
264 #address-cells = <1>;
265 #size-cells = <0>;
269 enable-gpios = <&pio 45 0>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&panel_pins_default>;
272 avdd-supply = <&ppvarn_lcd>;
273 avee-supply = <&ppvarp_lcd>;
274 pp1800-supply = <&pp1800_lcd>;
279 remote-endpoint = <&dsi_out>;
287 remote-endpoint = <&panel_in>;
294 mediatek,broken-save-restore-fw;
298 mali-supply = <&mt6358_vgpu_reg>;
302 pinctrl-names = "default";
303 pinctrl-0 = <&i2c0_pins>;
305 clock-frequency = <400000>;
306 #address-cells = <1>;
307 #size-cells = <0>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&i2c1_pins>;
314 clock-frequency = <100000>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&i2c3_pins>;
321 clock-frequency = <100000>;
322 #address-cells = <1>;
323 #size-cells = <0>;
327 pinctrl-names = "default";
328 pinctrl-0 = <&i2c5_pins>;
330 clock-frequency = <100000>;
331 #address-cells = <1>;
332 #size-cells = <0>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&i2c6_pins>;
339 clock-frequency = <100000>;
348 pinctrl-names = "default", "state_uhs";
349 pinctrl-0 = <&mmc0_pins_default>;
350 pinctrl-1 = <&mmc0_pins_uhs>;
351 bus-width = <8>;
352 max-frequency = <200000000>;
353 cap-mmc-highspeed;
354 mmc-hs200-1_8v;
355 mmc-hs400-1_8v;
356 cap-mmc-hw-reset;
357 no-sdio;
358 no-sd;
359 hs400-ds-delay = <0x12814>;
360 vmmc-supply = <&mt6358_vemc_reg>;
361 vqmmc-supply = <&mt6358_vio18_reg>;
362 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
363 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
364 non-removable;
369 pinctrl-names = "default", "state_uhs";
370 pinctrl-0 = <&mmc1_pins_default>;
371 pinctrl-1 = <&mmc1_pins_uhs>;
372 vmmc-supply = <&mmc1_fixed_power>;
373 vqmmc-supply = <&mmc1_fixed_io>;
374 mmc-pwrseq = <&wifi_pwrseq>;
375 bus-width = <4>;
376 max-frequency = <200000000>;
377 cap-sd-highspeed;
378 sd-uhs-sdr50;
379 sd-uhs-sdr104;
380 keep-power-in-suspend;
381 wakeup-source;
382 cap-sdio-irq;
383 non-removable;
384 no-mmc;
385 no-sd;
386 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
387 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
388 #address-cells = <1>;
389 #size-cells = <0>;
391 qca_wifi: qca-wifi@1 {
398 regulator-always-on;
402 Avdd-supply = <&mt6358_vaud28_reg>;
406 vsys-ldo1-supply = <®_vsys>;
407 vsys-ldo2-supply = <®_vsys>;
408 vsys-ldo3-supply = <®_vsys>;
409 vsys-vcore-supply = <®_vsys>;
410 vsys-vdram1-supply = <®_vsys>;
411 vsys-vgpu-supply = <®_vsys>;
412 vsys-vmodem-supply = <®_vsys>;
413 vsys-vpa-supply = <®_vsys>;
414 vsys-vproc11-supply = <®_vsys>;
415 vsys-vproc12-supply = <®_vsys>;
416 vsys-vs1-supply = <®_vsys>;
417 vsys-vs2-supply = <®_vsys>;
418 vs1-ldo1-supply = <&mt6358_vs1_reg>;
419 vs2-ldo1-supply = <&mt6358_vdram1_reg>;
420 vs2-ldo2-supply = <&mt6358_vs2_reg>;
421 vs2-ldo3-supply = <&mt6358_vs2_reg>;
422 vs2-ldo4-supply = <&mt6358_vs2_reg>;
426 regulator-max-microvolt = <900000>;
428 regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
429 regulator-coupled-max-spread = <100000>;
433 regulator-min-microvolt = <2700000>;
434 regulator-max-microvolt = <2700000>;
438 regulator-min-microvolt = <2700000>;
439 regulator-max-microvolt = <2700000>;
443 regulator-min-microvolt = <850000>;
444 regulator-max-microvolt = <1000000>;
446 regulator-coupled-with = <&mt6358_vgpu_reg>;
447 regulator-coupled-max-spread = <100000>;
452 pins-bus {
474 pins-bus {
480 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
481 drive-strength = <6>;
486 pins-bus {
493 input-enable;
494 bias-pull-down;
495 drive-strength = <2>;
499 bt_pins: bt-pins {
500 pins-bt-en {
502 output-low;
506 ec_ap_int_odl: ec-ap-int-odl {
509 input-enable;
510 bias-pull-up;
514 h1_int_od_l: h1-int-od-l {
517 input-enable;
522 pins-bus {
525 mediatek,pull-up-adv = <3>;
530 pins-bus {
533 mediatek,pull-up-adv = <3>;
538 pins-bus {
541 bias-disable;
546 pins-bus {
549 mediatek,pull-up-adv = <3>;
554 pins-bus {
557 bias-disable;
562 pins-bus {
565 mediatek,pull-up-adv = <3>;
570 pins-bus {
573 bias-disable;
577 mmc0_pins_default: mmc0-pins-default {
578 pins-cmd-dat {
588 input-enable;
589 drive-strength = <MTK_DRIVE_14mA>;
590 mediatek,pull-up-adv = <01>;
593 pins-clk {
595 drive-strength = <MTK_DRIVE_14mA>;
596 mediatek,pull-down-adv = <10>;
599 pins-rst {
601 drive-strength = <MTK_DRIVE_14mA>;
602 mediatek,pull-down-adv = <01>;
606 mmc0_pins_uhs: mmc0-pins-uhs {
607 pins-cmd-dat {
617 input-enable;
618 drive-strength = <MTK_DRIVE_14mA>;
619 mediatek,pull-up-adv = <01>;
622 pins-clk {
624 drive-strength = <MTK_DRIVE_14mA>;
625 mediatek,pull-down-adv = <10>;
628 pins-ds {
630 drive-strength = <MTK_DRIVE_14mA>;
631 mediatek,pull-down-adv = <10>;
634 pins-rst {
636 drive-strength = <MTK_DRIVE_14mA>;
637 mediatek,pull-up-adv = <01>;
641 mmc1_pins_default: mmc1-pins-default {
642 pins-cmd-dat {
648 input-enable;
649 mediatek,pull-up-adv = <10>;
652 pins-clk {
654 input-enable;
655 mediatek,pull-down-adv = <10>;
659 mmc1_pins_uhs: mmc1-pins-uhs {
660 pins-cmd-dat {
666 drive-strength = <6>;
667 input-enable;
668 mediatek,pull-up-adv = <10>;
671 pins-clk {
673 drive-strength = <8>;
674 mediatek,pull-down-adv = <10>;
675 input-enable;
679 panel_pins_default: panel-pins-default {
680 panel-reset {
682 output-low;
683 bias-pull-up;
687 pwm0_pin_default: pwm0-pin-default {
690 output-high;
691 bias-pull-up;
699 pins-scp-uart {
706 pins-spi {
711 bias-disable;
716 pins-spi {
721 bias-disable;
726 pins-spi {
730 bias-disable;
732 pins-spi-mi {
734 mediatek,pull-down-adv = <00>;
739 pins-spi {
744 bias-disable;
749 pins-spi {
754 bias-disable;
759 pins-spi {
764 bias-disable;
768 uart0_pins_default: uart0-pins-default {
769 pins-rx {
771 input-enable;
772 bias-pull-up;
774 pins-tx {
779 uart1_pins_default: uart1-pins-default {
780 pins-rx {
782 input-enable;
783 bias-pull-up;
785 pins-tx {
788 pins-rts {
791 pins-cts {
793 input-enable;
797 uart1_pins_sleep: uart1-pins-sleep {
798 pins-rx {
800 input-enable;
801 bias-pull-up;
803 pins-tx {
806 pins-rts {
809 pins-cts {
811 input-enable;
815 wifi_pins_pwrseq: wifi-pins-pwrseq {
816 pins-wifi-enable {
818 output-low;
822 wifi_pins_wakeup: wifi-pins-wakeup {
823 pins-wifi-wakeup {
825 input-enable;
831 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
836 pinctrl-names = "default";
837 pinctrl-0 = <&pwm0_pin_default>;
843 firmware-name = "mediatek/mt8183/scp.img";
844 pinctrl-names = "default";
845 pinctrl-0 = <&scp_pins>;
847 cros-ec-rpmsg {
848 compatible = "google,cros-ec-rpmsg";
849 mediatek,rpmsg-name = "cros-ec-rpmsg";
854 domain-supply = <&mt6358_vsram_gpu_reg>;
858 domain-supply = <&mt6358_vgpu_reg>;
862 pinctrl-names = "default";
863 pinctrl-0 = <&spi0_pins>;
864 mediatek,pad-select = <0>;
866 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
871 spi-max-frequency = <1000000>;
872 pinctrl-names = "default";
873 pinctrl-0 = <&h1_int_od_l>;
874 interrupts-extended = <&pio 153 IRQ_TYPE_EDGE_RISING>;
879 pinctrl-names = "default";
880 pinctrl-0 = <&spi1_pins>;
881 mediatek,pad-select = <0>;
885 compatible = "winbond,w25q64dw", "jedec,spi-nor";
887 spi-max-frequency = <25000000>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&spi2_pins>;
894 mediatek,pad-select = <0>;
897 cros_ec: cros-ec@0 {
898 compatible = "google,cros-ec-spi";
900 spi-max-frequency = <3000000>;
901 interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>;
902 pinctrl-names = "default";
903 pinctrl-0 = <&ec_ap_int_odl>;
904 wakeup-source;
906 i2c_tunnel: i2c-tunnel {
907 compatible = "google,cros-ec-i2c-tunnel";
908 google,remote-bus = <1>;
909 #address-cells = <1>;
910 #size-cells = <0>;
914 compatible = "google,extcon-usbc-cros-ec";
915 google,usb-port-id = <0>;
919 compatible = "google,cros-ec-typec";
920 #address-cells = <1>;
921 #size-cells = <0>;
924 compatible = "usb-c-connector";
926 power-role = "dual";
927 data-role = "host";
928 try-power-role = "sink";
935 pinctrl-names = "default";
936 pinctrl-0 = <&spi3_pins>;
937 mediatek,pad-select = <0>;
942 pinctrl-names = "default";
943 pinctrl-0 = <&spi4_pins>;
944 mediatek,pad-select = <0>;
949 pinctrl-names = "default";
950 pinctrl-0 = <&spi5_pins>;
951 mediatek,pad-select = <0>;
957 wakeup-source;
958 vusb33-supply = <&mt6358_vusb_reg>;
964 polling-delay = <1000>; /* milliseconds */
965 polling-delay-passive = <0>; /* milliseconds */
966 thermal-sensors = <&tboard_thermistor1>;
970 polling-delay = <1000>; /* milliseconds */
971 polling-delay-passive = <0>; /* milliseconds */
972 thermal-sensors = <&tboard_thermistor2>;
981 pinctrl-names = "default";
982 pinctrl-0 = <&uart0_pins_default>;
987 pinctrl-names = "default", "sleep";
988 pinctrl-0 = <&uart1_pins_default>;
989 pinctrl-1 = <&uart1_pins_sleep>;
991 /delete-property/ interrupts;
992 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
996 pinctrl-names = "default";
997 pinctrl-0 = <&bt_pins>;
999 compatible = "qcom,qca6174-bt";
1000 enable-gpios = <&pio 120 0>;
1002 firmware-name = "nvm_00440302_i2s.bin";
1007 #address-cells = <1>;
1008 #size-cells = <0>;
1009 vusb33-supply = <&mt6358_vusb_reg>;
1018 #include <arm/cros-ec-sbs.dtsi>