dts/mediatek/mt8183-evb.dts

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
14 	chassis-type = "embedded";
15 	compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
27 		stdout-path = "serial0:921600n8";
30 	reserved-memory {
31 		#address-cells = <2>;
32 		#size-cells = <2>;
35 			compatible = "shared-dma-pool";
37 			no-map;
41 	thermal-sensor {
43 		pullup-uv = <1800000>;
44 		pullup-ohm = <390000>;
45 		pulldown-ohm = <0>;
46 		io-channels = <&auxadc 0>;
55 	mali-supply = <&mt6358_vgpu_reg>;
59 	pinctrl-names = "default";
60 	pinctrl-0 = <&i2c_pins_0>;
62 	clock-frequency = <100000>;
66 	pinctrl-names = "default";
67 	pinctrl-0 = <&i2c_pins_1>;
69 	clock-frequency = <100000>;
73 	pinctrl-names = "default";
74 	pinctrl-0 = <&i2c_pins_2>;
76 	clock-frequency = <100000>;
80 	pinctrl-names = "default";
81 	pinctrl-0 = <&i2c_pins_3>;
83 	clock-frequency = <100000>;
87 	pinctrl-names = "default";
88 	pinctrl-0 = <&i2c_pins_4>;
90 	clock-frequency = <1000000>;
94 	pinctrl-names = "default";
95 	pinctrl-0 = <&i2c_pins_5>;
97 	clock-frequency = <1000000>;
102 	pinctrl-names = "default", "state_uhs";
103 	pinctrl-0 = <&mmc0_pins_default>;
104 	pinctrl-1 = <&mmc0_pins_uhs>;
105 	bus-width = <8>;
106 	max-frequency = <200000000>;
107 	cap-mmc-highspeed;
108 	mmc-hs200-1_8v;
109 	mmc-hs400-1_8v;
110 	cap-mmc-hw-reset;
111 	no-sdio;
112 	no-sd;
113 	hs400-ds-delay = <0x12814>;
114 	vmmc-supply = <&mt6358_vemc_reg>;
115 	vqmmc-supply = <&mt6358_vio18_reg>;
116 	assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
117 	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
118 	non-removable;
123 	pinctrl-names = "default", "state_uhs";
124 	pinctrl-0 = <&mmc1_pins_default>;
125 	pinctrl-1 = <&mmc1_pins_uhs>;
126 	bus-width = <4>;
127 	max-frequency = <200000000>;
128 	cap-sd-highspeed;
129 	sd-uhs-sdr50;
130 	sd-uhs-sdr104;
131 	cap-sdio-irq;
132 	no-mmc;
133 	no-sd;
134 	vmmc-supply = <&mt6358_vmch_reg>;
135 	vqmmc-supply = <&mt6358_vmc_reg>;
136 	keep-power-in-suspend;
137 	wakeup-source;
138 	non-removable;
142 	regulator-min-microvolt = <625000>;
143 	regulator-max-microvolt = <900000>;
145 	regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
146 	regulator-coupled-max-spread = <100000>;
150 	regulator-min-microvolt = <850000>;
151 	regulator-max-microvolt = <1000000>;
153 	regulator-coupled-with = <&mt6358_vgpu_reg>;
154 	regulator-coupled-max-spread = <100000>;
162 			mediatek,pull-up-adv = <3>;
170 			mediatek,pull-up-adv = <3>;
178 			mediatek,pull-up-adv = <3>;
186 			mediatek,pull-up-adv = <3>;
194 			mediatek,pull-up-adv = <3>;
202 			mediatek,pull-up-adv = <3>;
212 			bias-disable;
227 			input-enable;
228 			bias-pull-up;
233 			bias-pull-down;
238 			bias-pull-up;
253 			input-enable;
254 			drive-strength = <MTK_DRIVE_10mA>;
255 			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
260 			drive-strength = <MTK_DRIVE_10mA>;
261 			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
266 			drive-strength = <MTK_DRIVE_10mA>;
267 			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
272 			drive-strength = <MTK_DRIVE_10mA>;
273 			bias-pull-up;
284 			input-enable;
285 			bias-pull-up;
290 			input-enable;
291 			bias-pull-down;
297 			output-high;
308 			drive-strength = <MTK_DRIVE_6mA>;
309 			input-enable;
310 			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
315 			drive-strength = <MTK_DRIVE_6mA>;
316 			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
317 			input-enable;
327 			bias-disable;
337 			bias-disable;
347 			bias-disable;
357 			bias-disable;
367 			bias-disable;
379 	interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>;
383 	domain-supply = <&mt6358_vgpu_reg>;
387 	pinctrl-names = "default";
388 	pinctrl-0 = <&spi_pins_0>;
389 	mediatek,pad-select = <0>;
394 	pinctrl-names = "default";
395 	pinctrl-0 = <&spi_pins_1>;
396 	mediatek,pad-select = <0>;
401 	pinctrl-names = "default";
402 	pinctrl-0 = <&spi_pins_2>;
403 	mediatek,pad-select = <0>;
408 	pinctrl-names = "default";
409 	pinctrl-0 = <&spi_pins_3>;
410 	mediatek,pad-select = <0>;
415 	pinctrl-names = "default";
416 	pinctrl-0 = <&spi_pins_4>;
417 	mediatek,pad-select = <0>;
422 	pinctrl-names = "default";
423 	pinctrl-0 = <&spi_pins_5>;
424 	mediatek,pad-select = <0>;
430 	proc-supply = <&mt6358_vproc12_reg>;
434 	proc-supply = <&mt6358_vproc12_reg>;
438 	proc-supply = <&mt6358_vproc12_reg>;
442 	proc-supply = <&mt6358_vproc12_reg>;
446 	proc-supply = <&mt6358_vproc12_reg>;
450 	proc-supply = <&mt6358_vproc11_reg>;
454 	proc-supply = <&mt6358_vproc11_reg>;
458 	proc-supply = <&mt6358_vproc11_reg>;
462 	proc-supply = <&mt6358_vproc11_reg>;
471 	pinctrl-0 = <&pwm_pins_1>;
472 	pinctrl-names = "default";