Lines Matching +full:ir +full:- +full:spi +full:- +full:led
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
38 sram-supply = <&mt6380_vm_reg>;
42 gpio-keys {
43 compatible = "gpio-keys";
45 factory-key {
51 wps-key {
59 compatible = "gpio-leds";
61 led-0 {
62 label = "bpi-r64:pio:green";
65 default-state = "off";
68 led-1 {
69 label = "bpi-r64:pio:red";
72 default-state = "off";
81 reg_1p8v: regulator-1p8v {
82 compatible = "regulator-fixed";
83 regulator-name = "fixed-1.8V";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
86 regulator-always-on;
89 reg_3p3v: regulator-3p3v {
90 compatible = "regulator-fixed";
91 regulator-name = "fixed-3.3V";
92 regulator-min-microvolt = <3300000>;
93 regulator-max-microvolt = <3300000>;
94 regulator-boot-on;
95 regulator-always-on;
98 reg_5v: regulator-5v {
99 compatible = "regulator-fixed";
100 regulator-name = "fixed-5V";
101 regulator-min-microvolt = <5000000>;
102 regulator-max-microvolt = <5000000>;
103 regulator-boot-on;
104 regulator-always-on;
117 pinctrl-names = "default";
118 pinctrl-0 = <&irrx_pins>;
125 compatible = "mediatek,eth-mac";
127 phy-mode = "2500base-x";
129 fixed-link {
131 full-duplex;
137 compatible = "mediatek,eth-mac";
139 phy-mode = "rgmii";
141 fixed-link {
143 full-duplex;
148 mdio: mdio-bus {
149 #address-cells = <1>;
150 #size-cells = <0>;
155 interrupt-controller;
156 #interrupt-cells = <1>;
157 interrupts-extended = <&pio 53 IRQ_TYPE_LEVEL_HIGH>;
158 reset-gpios = <&pio 54 0>;
161 #address-cells = <1>;
162 #size-cells = <0>;
192 phy-mode = "rgmii";
194 fixed-link {
196 full-duplex;
205 phy-mode = "2500base-x";
207 fixed-link {
209 full-duplex;
220 pinctrl-names = "default";
221 pinctrl-0 = <&i2c1_pins>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&i2c2_pins>;
232 pinctrl-names = "default", "state_uhs";
233 pinctrl-0 = <&emmc_pins_default>;
234 pinctrl-1 = <&emmc_pins_uhs>;
236 bus-width = <8>;
237 max-frequency = <50000000>;
238 cap-mmc-highspeed;
239 mmc-hs200-1_8v;
240 vmmc-supply = <®_3p3v>;
241 vqmmc-supply = <®_1p8v>;
242 assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
243 assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
244 non-removable;
248 pinctrl-names = "default", "state_uhs";
249 pinctrl-0 = <&sd0_pins_default>;
250 pinctrl-1 = <&sd0_pins_uhs>;
252 bus-width = <4>;
253 max-frequency = <50000000>;
254 cap-sd-highspeed;
255 cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
256 vmmc-supply = <®_3p3v>;
257 vqmmc-supply = <®_3p3v>;
258 assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
259 assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
263 pinctrl-names = "default";
264 pinctrl-0 = <¶llel_nand_pins>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&serial_nand_pins>;
277 compatible = "spi-nand";
279 spi-tx-bus-width = <4>;
280 spi-rx-bus-width = <4>;
281 nand-ecc-engine = <&snfi>;
283 compatible = "fixed-partitions";
284 #address-cells = <1>;
285 #size-cells = <1>;
290 read-only;
296 read-only;
308 pinctrl-names = "default";
309 pinctrl-0 = <&pcie0_pins>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pcie1_pins>;
321 * SATA functions. i.e. output-high: PCIe, output-low: SATA
324 gpio-hog;
326 output-high;
330 emmc_pins_default: emmc-pins-default {
340 conf-cmd-dat {
344 input-enable;
345 bias-pull-up;
348 conf-clk {
350 bias-pull-down;
354 emmc_pins_uhs: emmc-pins-uhs {
360 conf-cmd-dat {
364 input-enable;
365 drive-strength = <4>;
366 bias-pull-up;
369 conf-clk {
371 drive-strength = <4>;
372 bias-pull-down;
376 eth_pins: eth-pins {
383 i2c1_pins: i2c1-pins {
390 i2c2_pins: i2c2-pins {
397 i2s1_pins: i2s1-pins {
408 drive-strength = <12>;
409 bias-pull-down;
413 irrx_pins: irrx-pins {
415 function = "ir";
420 irtx_pins: irtx-pins {
422 function = "ir";
428 parallel_nand_pins: parallel-nand-pins {
435 pcie0_pins: pcie0-pins {
444 pcie1_pins: pcie1-pins {
453 pmic_bus_pins: pmic-bus-pins {
460 pwm_pins: pwm-pins {
472 wled_pins: wled-pins {
474 function = "led";
479 sd0_pins_default: sd0-pins-default {
489 conf-cmd-data {
492 input-enable;
493 drive-strength = <8>;
494 bias-pull-up;
496 conf-clk {
498 drive-strength = <12>;
499 bias-pull-down;
501 conf-cd {
503 bias-pull-up;
507 sd0_pins_uhs: sd0-pins-uhs {
513 conf-cmd-data {
516 input-enable;
517 bias-pull-up;
520 conf-clk {
522 bias-pull-down;
526 /* Serial NAND is shared pin with SPI-NOR */
527 serial_nand_pins: serial-nand-pins {
534 spic0_pins: spic0-pins {
536 function = "spi";
541 spic1_pins: spic1-pins {
543 function = "spi";
548 /* SPI-NOR is shared pin with serial NAND */
549 spi_nor_pins: spi-nor-pins {
556 /* serial NAND is shared pin with SPI-NOR */
557 serial_nand_pins: serial-nand-pins {
564 uart0_pins: uart0-pins {
571 uart2_pins: uart2-pins {
578 watchdog_pins: watchdog-pins {
587 pinctrl-names = "default";
588 pinctrl-0 = <&pwm_pins>;
593 pinctrl-names = "default";
594 pinctrl-0 = <&pmic_bus_pins>;
608 pinctrl-names = "default";
609 pinctrl-0 = <&spic0_pins>;
614 pinctrl-names = "default";
615 pinctrl-0 = <&spic1_pins>;
619 vusb33-supply = <®_3p3v>;
620 vbus-supply = <®_5v>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&uart0_pins>;
635 pinctrl-names = "default";
636 pinctrl-0 = <&uart2_pins>;
640 pinctrl-names = "default";
641 pinctrl-0 = <&watchdog_pins>;