dts/marvell/cn9130-db.dtsi

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5  * Device tree for the CN9130-DB board.
10 #include <dt-bindings/gpio/gpio.h>
14 		stdout-path = "serial0:115200n8";
33 	ap0_reg_sd_vccq: regulator-1 {
34 		compatible = "regulator-gpio";
35 		regulator-name = "ap0_sd_vccq";
36 		regulator-min-microvolt = <1800000>;
37 		regulator-max-microvolt = <3300000>;
42 	cp0_reg_usb3_vbus0: regulator-2 {
43 		compatible = "regulator-fixed";
44 		regulator-name = "cp0-xhci0-vbus";
45 		regulator-min-microvolt = <5000000>;
46 		regulator-max-microvolt = <5000000>;
47 		enable-active-high;
51 	cp0_usb3_0_phy0: usb-phy-1 {
52 		compatible = "usb-nop-xceiv";
53 		vcc-supply = <&cp0_reg_usb3_vbus0>;
56 	cp0_reg_usb3_vbus1: regulator-3 {
57 		compatible = "regulator-fixed";
58 		regulator-name = "cp0-xhci1-vbus";
59 		regulator-min-microvolt = <5000000>;
60 		regulator-max-microvolt = <5000000>;
61 		enable-active-high;
65 	cp0_usb3_0_phy1: usb-phy-2 {
66 		compatible = "usb-nop-xceiv";
67 		vcc-supply = <&cp0_reg_usb3_vbus1>;
70 	cp0_reg_sd_vccq: regulator-4 {
71 		compatible = "regulator-gpio";
72 		regulator-name = "cp0_sd_vccq";
73 		regulator-min-microvolt = <1800000>;
74 		regulator-max-microvolt = <3300000>;
80 	cp0_reg_sd_vcc: regulator-5 {
81 		compatible = "regulator-fixed";
82 		regulator-name = "cp0_sd_vcc";
83 		regulator-min-microvolt = <3300000>;
84 		regulator-max-microvolt = <3300000>;
86 		enable-active-high;
87 		regulator-always-on;
90 	cp0_sfp_eth0: sfp-eth-1 {
92 		i2c-bus = <&cp0_sfpp0_i2c>;
93 		los-gpios = <&cp0_module_expander1 11 GPIO_ACTIVE_HIGH>;
94 		mod-def0-gpios = <&cp0_module_expander1 10 GPIO_ACTIVE_LOW>;
95 		tx-disable-gpios = <&cp0_module_expander1 9 GPIO_ACTIVE_HIGH>;
96 		tx-fault-gpios = <&cp0_module_expander1 8 GPIO_ACTIVE_HIGH>;
110 /* on-board eMMC - U9 */
112 	pinctrl-names = "default";
113 	bus-width = <8>;
114 	vqmmc-supply = <&ap0_reg_sd_vccq>;
126 /* SLM-1521-V2, CON9 */
129 	phy-mode = "10gbase-r";
132 	managed = "in-band-status";
140 	phy-mode = "rgmii-id";
147 	phy-mode = "rgmii-id";
160 	pinctrl-names = "default";
161 	pinctrl-0 = <&cp0_i2c0_pins>;
162 	clock-frequency = <100000>;
167 		pinctrl-names = "default";
168 		gpio-controller;
169 		#gpio-cells = <2>;
191 	clock-frequency = <100000>;
193 	/* SLM-1521-V2 - U3 */
194 	i2c-mux@72 { /* verify address - depends on dpr */
196 		#address-cells = <1>;
197 		#size-cells = <0>;
200 			#address-cells = <1>;
201 			#size-cells = <0>;
206 			#address-cells = <1>;
207 			#size-cells = <0>;
212 				pinctrl-names = "default";
213 				gpio-controller;
214 				#gpio-cells = <2>;
225 	phy0: ethernet-phy@0 {
229 	phy1: ethernet-phy@1 {
237 	pinctrl-names = "default";
238 	pinctrl-0 = <&nand_pins &nand_rb>;
242 		label = "main-storage";
243 		nand-rb = <0>;
244 		nand-ecc-mode = "hw";
245 		nand-on-flash-bbt;
246 		nand-ecc-strength = <8>;
247 		nand-ecc-step-size = <512>;
250 			compatible = "fixed-partitions";
251 			#address-cells = <1>;
252 			#size-cells = <1>;
255 				label = "U-Boot";
270 /* SLM-1521-V2, CON6 */
273 	num-lanes = <4>;
274 	num-viewport = <8>;
285 	/* SLM-1521-V2, CON2 */
286 	sata-port@1 {
296 	pinctrl-names = "default";
297 	pinctrl-0 = <&cp0_sdhci_pins
299 	bus-width = <4>;
300 	cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
301 	no-1-8-v;
302 	vqmmc-supply = <&cp0_reg_sd_vccq>;
303 	vmmc-supply = <&cp0_reg_sd_vcc>;
309 	pinctrl-names = "default";
310 	pinctrl-0 = <&cp0_spi1_pins>;
314 		compatible = "jedec,spi-nor";
316 		/* On-board MUX does not allow higher frequencies */
317 		spi-max-frequency = <40000000>;
320 			compatible = "fixed-partitions";
321 			#address-cells = <1>;
322 			#size-cells = <1>;
325 				label = "U-Boot-0";
330 				label = "Filesystem-0";
339 		compatible = "marvell,cp115-standalone-pinctrl";
341 		cp0_i2c0_pins: cp0-i2c-pins-0 {
345 		cp0_i2c1_pins: cp0-i2c-pins-1 {
349 		cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
356 		cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
363 		cp0_sdhci_cd_pins: cp0-sdhci-cd-pins-0 {
367 		cp0_sdhci_pins: cp0-sdhi-pins-0 {
372 		cp0_spi1_pins: cp0-spi-pins-1 {
376 		nand_pins: nand-pins {
383 		nand_rb: nand-rb {
396 	usb-phy = <&cp0_usb3_0_phy0>;
398 	phy-names = "utmi";
404 	usb-phy = <&cp0_usb3_0_phy1>;
406 	phy-names = "utmi";