Lines Matching +full:0 +full:x44460000
49 #size-cells = <0>;
56 arm,psci-suspend-param = <0x0010033>;
65 A55_0: cpu@0 {
68 reg = <0x0>;
84 reg = <0x100>;
129 #clock-cells = <0>;
136 #clock-cells = <0>;
143 #clock-cells = <0>;
171 reg = <0 0x48000000 0 0x10000>,
172 <0 0x48040000 0 0xc0000>;
184 thermal-sensors = <&tmu 0>;
231 #phy-cells = <0>;
238 #phy-cells = <0>;
243 soc@0 {
247 ranges = <0x0 0x0 0x0 0x80000000>,
248 <0x28000000 0x0 0x28000000 0x10000000>;
252 reg = <0x44000000 0x800000>;
259 reg = <0x44000000 0x200000>;
262 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, // 0: Reserved
299 reg = <0x44210000 0x1000>;
304 reg = <0x44230000 0x10000>;
313 reg = <0x44290000 0x30000>;
322 reg = <0x442d0000 0x10000>;
331 reg = <0x442e0000 0x10000>;
340 reg = <0x44310000 0x1000>;
348 reg = <0x44320000 0x10000>;
356 reg = <0x44330000 0x10000>;
359 #size-cells = <0>;
369 reg = <0x44340000 0x10000>;
371 #size-cells = <0>;
376 dmas = <&edma1 7 0 0>, <&edma1 8 0 FSL_EDMA_RX>;
383 reg = <0x44350000 0x10000>;
385 #size-cells = <0>;
390 dmas = <&edma1 9 0 0>, <&edma1 10 0 FSL_EDMA_RX>;
397 #size-cells = <0>;
399 reg = <0x44360000 0x10000>;
404 dmas = <&edma1 11 0 0>, <&edma1 12 0 FSL_EDMA_RX>;
411 #size-cells = <0>;
413 reg = <0x44370000 0x10000>;
418 dmas = <&edma1 13 0 0>, <&edma1 14 0 FSL_EDMA_RX>;
425 reg = <0x44380000 0x1000>;
429 dmas = <&edma1 17 0 FSL_EDMA_RX>, <&edma1 16 0 0>;
436 reg = <0x44390000 0x1000>;
440 dmas = <&edma1 19 0 FSL_EDMA_RX>, <&edma1 18 0 0>;
447 reg = <0x443a0000 0x10000>;
455 fsl,clk-source = /bits/ 8 <0>;
456 fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>;
462 reg = <0x443b0000 0x10000>;
468 dmas = <&edma1 22 0 FSL_EDMA_RX>, <&edma1 21 0 0>;
470 #sound-dai-cells = <0>;
476 reg = <0x443c0000 0x10000>;
482 reg = <0x44440000 0x10000>;
498 reg = <0x44450000 0x10000>;
509 reg = <0x44460000 0x10000>;
516 reg = <0x44461800 0x400>, <0x44464800 0x400>;
517 #power-domain-cells = <0>;
524 reg = <0x44462400 0x400>, <0x44465800 0x400>;
525 #power-domain-cells = <0>;
533 reg = <0x44480000 0x2000>;
539 reg = <0x44482000 0x1000>;
543 fsl,tmu-range = <0x800000da 0x800000e9
544 0x80000102 0x8000012a
545 0x80000166 0x800001a7
546 0x800001b6>;
547 fsl,tmu-calibration = <0x00000000 0x0000000e
548 0x00000001 0x00000029
549 0x00000002 0x00000056
550 0x00000003 0x000000a2
551 0x00000004 0x00000116
552 0x00000005 0x00000195
553 0x00000006 0x000001b2>;
559 reg = <0x44520000 0x10000>;
568 dmas = <&edma1 29 0 5>;
570 #sound-dai-cells = <0>;
576 reg = <0x44530000 0x10000>;
589 reg = <0x42000000 0x800000>;
596 reg = <0x42000000 0x210000>;
669 reg = <0x42420000 0x1000>;
674 reg = <0x42440000 0x10000>;
683 reg = <0x42490000 0x10000>;
692 reg = <0x424a0000 0x10000>;
701 reg = <0x424b0000 0x10000>;
710 reg = <0x424e0000 0x1000>;
718 reg = <0x424f0000 0x10000>;
726 reg = <0x42500000 0x10000>;
734 reg = <0x42510000 0x10000>;
742 reg = <0x42520000 0x10000>;
745 #size-cells = <0>;
755 reg = <0x42530000 0x10000>;
757 #size-cells = <0>;
762 dmas = <&edma2 8 0 0>, <&edma2 9 0 FSL_EDMA_RX>;
769 reg = <0x42540000 0x10000>;
771 #size-cells = <0>;
776 dmas = <&edma2 10 0 0>, <&edma2 11 0 FSL_EDMA_RX>;
783 #size-cells = <0>;
785 reg = <0x42550000 0x10000>;
790 dmas = <&edma2 12 0 0>, <&edma2 13 0 FSL_EDMA_RX>;
797 #size-cells = <0>;
799 reg = <0x42560000 0x10000>;
804 dmas = <&edma2 14 0 0>, <&edma2 15 0 FSL_EDMA_RX>;
811 reg = <0x42570000 0x1000>;
815 dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
822 reg = <0x42580000 0x1000>;
826 dmas = <&edma2 20 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
833 reg = <0x42590000 0x1000>;
837 dmas = <&edma2 22 0 FSL_EDMA_RX>, <&edma2 21 0 0>;
844 reg = <0x425a0000 0x1000>;
848 dmas = <&edma2 24 0 FSL_EDMA_RX>, <&edma2 23 0 0>;
855 reg = <0x425b0000 0x10000>;
863 fsl,clk-source = /bits/ 8 <0>;
864 fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>;
870 reg = <0x425e0000 0x10000>, <0x28000000 0x10000000>;
873 #size-cells = <0>;
885 reg = <0x42650000 0x10000>;
891 dmas = <&edma2 59 0 FSL_EDMA_RX>, <&edma2 58 0 0>;
893 #sound-dai-cells = <0>;
899 reg = <0x42660000 0x10000>;
905 dmas = <&edma2 61 0 FSL_EDMA_RX>, <&edma2 60 0 0>;
907 #sound-dai-cells = <0>;
913 reg = <0x42680000 0x800>,
914 <0x42680800 0x400>,
915 <0x42680c00 0x080>,
916 <0x42680e00 0x080>;
925 dmas = <&edma2 65 0 FSL_EDMA_RX>, <&edma2 66 0 0>;
927 #sound-dai-cells = <0>;
933 reg = <0x42690000 0x1000>;
937 dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
944 reg = <0x426a0000 0x1000>;
948 dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
955 reg = <0x426b0000 0x10000>;
957 #size-cells = <0>;
962 dmas = <&edma2 71 0 0>, <&edma2 72 0 FSL_EDMA_RX>;
969 reg = <0x426c0000 0x10000>;
971 #size-cells = <0>;
976 dmas = <&edma2 73 0 0>, <&edma2 74 0 FSL_EDMA_RX>;
983 reg = <0x426d0000 0x10000>;
985 #size-cells = <0>;
990 dmas = <&edma2 75 0 0>, <&edma2 76 0 FSL_EDMA_RX>;
997 reg = <0x426e0000 0x10000>;
999 #size-cells = <0>;
1004 dmas = <&edma2 77 0 0>, <&edma2 78 0 FSL_EDMA_RX>;
1011 #size-cells = <0>;
1013 reg = <0x426f0000 0x10000>;
1018 dmas = <&edma2 79 0 0>, <&edma2 80 0 FSL_EDMA_RX>;
1025 #size-cells = <0>;
1027 reg = <0x42700000 0x10000>;
1032 dmas = <&edma2 81 0 0>, <&edma2 82 0 FSL_EDMA_RX>;
1039 #size-cells = <0>;
1041 reg = <0x42710000 0x10000>;
1046 dmas = <&edma2 83 0 0>, <&edma2 84 0 FSL_EDMA_RX>;
1053 #size-cells = <0>;
1055 reg = <0x42720000 0x10000>;
1060 dmas = <&edma2 85 0 0>, <&edma2 86 0 FSL_EDMA_RX>;
1069 reg = <0x42800000 0x800000>;
1076 reg = <0x42850000 0x10000>;
1093 reg = <0x42860000 0x10000>;
1110 reg = <0x42890000 0x10000>;
1131 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
1139 reg = <0x428a0000 0x10000>;
1154 intf_mode = <&wakeupmix_gpr 0x28>;
1163 reg = <0x428b0000 0x10000>;
1181 reg = <0x43810000 0x1000>;
1191 gpio-ranges = <&iomuxc 0 4 30>;
1196 reg = <0x43820000 0x1000>;
1206 gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
1207 <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
1212 reg = <0x43830000 0x1000>;
1222 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
1227 reg = <0x47400000 0x1000>;
1237 gpio-ranges = <&iomuxc 0 92 16>;
1242 reg = <0x47510000 0x10000>;
1247 reg = <0x4ec 0x6>;
1251 reg = <0x4f2 0x6>;
1258 reg = <0x47520000 0x10000>;
1267 reg = <0x4ac10000 0x10000>;
1287 reg = <0x4c100000 0x200>;
1296 fsl,usbmisc = <&usbmisc1 0>;
1303 reg = <0x4c100200 0x200>;
1309 reg = <0x4c200000 0x200>;
1318 fsl,usbmisc = <&usbmisc2 0>;
1325 reg = <0x4c200200 0x200>;
1331 reg = <0x4e300dc0 0x200>;