Lines Matching +full:disable +full:- +full:smarteee
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "imx93-var-som.dtsi"
13 model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
14 compatible = "variscite,var-som-mx93-symphony",
15 "variscite,var-som-mx93", "fsl,imx93";
23 stdout-path = &lpuart1;
29 reg_fec_phy: regulator-fec-phy {
30 compatible = "regulator-fixed";
31 regulator-name = "fec-phy";
32 regulator-min-microvolt = <1800000>;
33 regulator-max-microvolt = <1800000>;
34 regulator-enable-ramp-delay = <20000>;
36 enable-active-high;
37 regulator-always-on;
40 reg_usdhc2_vmmc: regulator-usdhc2 {
41 compatible = "regulator-fixed";
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
44 regulator-name = "VSD_3V3";
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
48 off-on-delay-us = <20000>;
49 enable-active-high;
52 reg_vref_1v8: regulator-adc-vref {
53 compatible = "regulator-fixed";
54 regulator-name = "vref_1v8";
55 regulator-min-microvolt = <1800000>;
56 regulator-max-microvolt = <1800000>;
59 reserved-memory {
60 #address-cells = <2>;
61 #size-cells = <2>;
64 ethosu_mem: ethosu-region@88000000 {
65 compatible = "shared-dma-pool";
72 no-map;
77 no-map;
82 no-map;
87 no-map;
90 rsc_table: rsc-table@2021f000 {
92 no-map;
96 compatible = "shared-dma-pool";
98 no-map;
101 ele_reserved: ele-reserved@87de0000 {
102 compatible = "shared-dma-pool";
104 no-map;
108 gpio-keys {
109 compatible = "gpio-keys";
111 key-back {
117 key-home {
123 key-menu {
131 compatible = "gpio-leds";
133 led-0 {
137 linux,default-trigger = "heartbeat";
149 ethphy1: ethernet-phy@5 {
150 compatible = "ethernet-phy-ieee802.3-c22";
152 qca,disable-smarteee;
153 eee-broken-1000t;
154 reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>;
155 reset-assert-us = <10000>;
156 reset-deassert-us = <20000>;
157 vddio-supply = <&vddio1>;
159 vddio1: vddio-regulator {
160 regulator-min-microvolt = <1800000>;
161 regulator-max-microvolt = <1800000>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_fec>;
170 phy-mode = "rgmii";
171 phy-handle = <ðphy1>;
172 phy-supply = <®_fec_phy>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_flexcan1>;
183 clock-frequency = <400000>;
184 pinctrl-names = "default", "sleep", "gpio";
185 pinctrl-0 = <&pinctrl_lpi2c1>;
186 pinctrl-1 = <&pinctrl_lpi2c1_gpio>;
187 pinctrl-2 = <&pinctrl_lpi2c1_gpio>;
188 scl-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
189 sda-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
200 clock-frequency = <400000>;
201 pinctrl-names = "default", "sleep", "gpio";
202 pinctrl-0 = <&pinctrl_lpi2c5>;
203 pinctrl-1 = <&pinctrl_lpi2c5_gpio>;
204 pinctrl-2 = <&pinctrl_lpi2c5_gpio>;
205 scl-gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
206 sda-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
212 gpio-controller;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_pca9534>;
215 interrupt-parent = <&gpio3>;
217 #gpio-cells = <2>;
218 wakeup-source;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_uart1>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_uart6>;
238 pinctrl-names = "default", "state_100mhz", "state_200mhz";
239 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
240 pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
241 pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
242 cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
243 vmmc-supply = <®_usdhc2_vmmc>;
244 bus-width = <4>;
246 no-sdio;
247 no-mmc;