Lines Matching +full:0 +full:x1d0
25 led-0 {
27 gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
34 reg = <0x0 0x40000000 0 0xc0000000>,
35 <0x1 0x00000000 0 0xc0000000>;
70 pinctrl-0 = <&pinctrl_i2c1>;
75 reg = <0x25>;
77 pinctrl-0 = <&pinctrl_pmic>;
169 pinctrl-0 = <&pinctrl_i2c3>;
175 reg = <0x20>;
177 pinctrl-0 = <&pinctrl_pca9534>;
186 gpios = <4 0>;
196 pinctrl-0 = <&pinctrl_uart2>;
203 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
215 pinctrl-0 = <&pinctrl_usdhc3>;
225 pinctrl-0 = <&pinctrl_wdog>;
234 MX8MP_IOMUXC_SD1_DATA4__I2C1_SCL 0x400001c2
235 MX8MP_IOMUXC_SD1_DATA5__I2C1_SDA 0x400001c2
241 MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
242 MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
248 MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0xc0
254 MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x1c0
260 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40
261 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40
267 MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x1c4
268 MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x10
269 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0xc0
275 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
276 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
277 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
278 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
279 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
280 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
286 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
287 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
288 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
289 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
290 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
291 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
297 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
298 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
299 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
300 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
301 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
302 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
308 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
309 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
310 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
311 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
312 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
313 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
314 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
315 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
316 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
317 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
318 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
324 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
325 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
326 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
327 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
328 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
329 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
330 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
331 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
332 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
333 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
334 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
340 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
341 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
342 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6
343 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6
344 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6
345 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6
346 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6
347 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6
348 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6
349 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6
350 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
356 MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xc6