Lines Matching +full:0 +full:x90
21 reg = <0x0 0x40000000 0 0x80000000>;
53 pinctrl-0 = <&pinctrl_fec>;
61 #size-cells = <0>;
63 ethphy1: ethernet-phy@0 {
65 reg = <0>;
78 pinctrl-0 = <&pinctrl_flexspi0>;
81 som_flash: flash@0 {
83 reg = <0>;
93 pinctrl-0 = <&pinctrl_i2c1>;
101 reg = <0x25>;
105 pinctrl-0 = <&pinctrl_pmic>;
180 reg = <0x51>;
187 reg = <0x52>;
196 pinctrl-0 = <&pinctrl_usdhc3>;
206 pinctrl-0 = <&pinctrl_wdog>;
227 MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
228 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
229 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
230 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
231 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
232 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
233 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
234 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x12
235 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x12
236 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14
237 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14
238 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14
239 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14
240 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
246 MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK 0x1c2
247 MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B 0x82
248 MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00 0x82
249 MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01 0x82
250 MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02 0x82
251 MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82
257 MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
258 MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
264 MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e2
265 MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e2
271 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x140
277 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190
278 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0
279 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0
280 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0
281 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0
282 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0
283 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0
284 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0
285 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0
286 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190
287 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0
293 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194
294 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4
295 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4
296 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4
297 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4
298 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4
299 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4
300 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4
301 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4
302 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
303 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
309 MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196
310 MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d2
311 MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d2
312 MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d2
313 MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d2
314 MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d2
315 MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d2
316 MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d2
317 MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d2
318 MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
319 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
325 MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0xe6